Chip Industry Week in Review


The Biden-Harris Administration announced preliminary terms with HP for $50 million in direct funding under the CHIPs and Science Act to support the expansion and modernization of HP’s existing microfluidics and microelectromechanical systems (“MEMS”) facility in Corvallis, Oregon. CHIPS for America launched the CHIPS Metrology Community, a collaborative initiative designed to advance ... » read more

Chip Industry’s Technical Paper Roundup: November 6


New technical papers added to Semiconductor Engineering’s library this week. [table id=162 /] More Reading Technical Paper Library home » read more

Light-Matter Interaction In Van Der Waals Nanophotonic Devices


A technical paper titled “Deeply subwavelength integrated excitonic van der Waals nanophotonics” was published by researchers at University of California Los Angeles, University of Washington Seattle, and Auburn University. Abstract: "The wave nature of light sets a fundamental diffraction limit that challenges confinement and control of light in nanoscale structures with dimensions signi... » read more

Chip Industry’s Technical Paper Roundup: October 31


New technical papers added to Semiconductor Engineering’s library this week. [table id=159 /] More Reading Technical Paper Library home » read more

Measurement-Induced Quantum Information Phases On Up To 70 Superconducting Qubits (Google/Stanford)


A technical paper titled “Measurement-induced entanglement and teleportation on a noisy quantum processor” was published by researchers at Google Quantum AI, Google Research, Stanford University, University of Texas at Austin, Cornell University, University of Massachusetts, University of Connecticut, Auburn University, University of Technology Sydney, University of California, and Columbia... » read more

Chip Industry’s Technical Paper Roundup: June 20


New technical papers added to Semiconductor Engineering’s library this week. [table id=112 /] » read more

Chiplets: Bridging The Gap Between The System Requirements And Design Aggregation, Planning, And Optimization


A technical paper titled “System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine Learning” was published by researchers at Auburn University. Abstract: "With the availability of advanced packaging technology and its attractive features, the chiplet-based architecture has gained traction among chip designers. The large design space and the lack of sys... » read more

Chip Industry’s Technical Paper Roundup: Jan. 17


New technical papers added to Semiconductor Engineering’s library. [table id=74 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting li... » read more

High Dynamic Range Josephson Parametric Amplifiers (Google Quantum AI & Others)


A technical paper titled "Readout of a quantum processor with high dynamic range Josephson parametric amplifiers" was published by researchers at Google Quantum AI, University of Massachusetts, Auburn University and UCSB. "We demonstrate a resonant Josephson parametric amplifier that achieves the bandwidth performance of a matched JPA and a hundred-fold increase in saturation power," states ... » read more

Chip Industry’s Technical Paper Roundup: Dec. 20


New technical papers added to Semiconductor Engineering’s library this week. [table id=71 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us po... » read more

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