tag: Cadence

Blog Review: March 8
By Jesse Allen - 08 Mar, 2017 - Comments: 0

Mentor's Andrew Macleod proposes that the growing complexity of automotive systems opens up room for a Tier 1.5 bridging systems engineering and design optimization. Cadence's Dave Pursley argues that working at a higher level of abstraction makes hardware design more effective, more interesting, and more fun. Synopsys' Robert Vamosi considers the challenges surrounding responsible disclo... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 03 Mar, 2017 - Comments: 2

SPIE news At this week’s SPIE Advanced Lithography conference, the industry paid close attention to the progress of extreme ultraviolet (EUV) lithography. Here’s the general report card: EUV is making noticeable progress, but there are still some challenges ahead, such as the power source, resists and pellicles. Several issues need to be resolved before chipmakers can put EUV into mass... » read more

The Week In Review: Design
By Jesse Allen - 03 Mar, 2017 - Comments: 0

Legal Synopsys filed suit against Ubiquiti Networks and its project leader for "circumventing technological measures that effectively control access to Synopsys' software." The suit, filed in U.S. District Court in San Jose, claims that Ubiquiti used counterfeit keys obtained or created with tools from hacker websites to circumvent Synopsys' License Key system. Ubiquiti, based in San Jose, d... » read more

ASIL D Requires Precision
By Ann Mutschler - 02 Mar, 2017 - Comments: 0

It seems the entire world is abuzz with the excitement surround autonomous driving, and while more driver assist features are added to new vehicles all the time, this is tempered by the fact that there is still much work to be done when it comes to safety. For developers across the automotive ecosystem, safety comes down to the Automotive Safety Integrity Level (ASIL) risk classification sch... » read more

Why Auto Designs Take So Long
By Ann Mutschler - 02 Mar, 2017 - Comments: 0

Designing chips for the automotive market is adding significant overhead, particularly for chips with stringent safety requirements. On the verification side it could result in an additional 6 to 12 months of work. On the design side, developing the same processor in the mobile market would take 6 fewer man months. And when it comes to complex electronic control units (ECUs) or [getkc id="81... » read more

Blog Review: March 1
By Jesse Allen - 01 Mar, 2017 - Comments: 0

In a video, Mentor's Wally Rhines discusses the evolution of test methodologies and the forces that will change test priorities. Cadence's Priya Balasubramanian explores memory trends in data servers driven by the Internet's massive need for bandwidth. Synopsys' Aadil Trikha presents a primer on the types of AMBA ACE barrier transactions. ARM's Simon Segars examines the state of IoT de... » read more

What Does An AI Chip Look Like?
By Ed Sperling - 01 Mar, 2017 - Comments: 5

Depending upon your point of reference, artificial intelligence will be the next big thing or it will play a major role in all of the next big things. This explains the frenzy of activity in this sector over the past 18 months. Big companies are paying billions of dollars to acquire startup companies, and even more for R&D. In addition, governments around the globe are pouring additional... » read more

Embedded FPGAs Come Of Age
By Ann Mutschler - 27 Feb, 2017 - Comments: 0

FPGAs increasingly are being viewed as a critical component in heterogeneous designs, ratcheting up their stature and the amount of attention being given to programmable devices. Once relegated to test chips that ultimately would be replaced by lower-power and higher-performance ASICs if volumes were sufficient, FPGAs have come a long way. Over the last 20 years programmable devices have mov... » read more

The Week In Review: Design
By Jesse Allen - 24 Feb, 2017 - Comments: 0

M&A ARM made two acquisitions to add the new NarrowBand-IoT (NB-IoT) low power wide area connectivity standard to its designs: Mistbase, founded in 2015 in Sweden, provides a complete NB-IoT physical layer implementation solution, while London-based NextG-Com, founded in 2008, offers a complete layer two and three software stack for NB-IoT. Tools Synopsys released the latest versio... » read more

Fault Simulation Reborn
By Brian Bailey - 23 Feb, 2017 - Comments: 0

Fault simulation, one of the oldest tools in the EDA industry toolbox, is receiving a serious facelift after it almost faded from existence. In the early days, fault simulation was used to grade the quality of manufacturing test vectors. That task was replaced almost entirely by [getkc id="173" comment="scan test"] and automatic test pattern generation (ATPG). Today, functional safety is cau... » read more

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