tag: Cadence

Week In Review: Design, Low Power
By SE Staff - 01 Sep, 2023 - Comments: 0

Design & IP Arm launched the Neoverse Compute Subsystems (CSS), pre-integrated and validated configurations of Arm Neoverse platform IP, at this week's Hot Chips conference. CSS helps streamline SoC designs for data centers and is optimized for an advanced 5nm process. The first generation of CSS (Neoverse CSS N2) is based on Arm’s Neoverse N2 platform. Core count is configurable (24 to ... » read more

Need To Share Data Widens In IC Manufacturing
By Ed Sperling - 31 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss issues in smart manufacturing of chips, including data management and grounding, chiplets, and standards, with Mujtaba Hamid, general manager for product management for secure cloud environments at Microsoft; Vijaykishan Narayanan, vice president and general manager of India engineering and operations at proteanTecs; KT Moore,... » read more

Blog Review: August 30
By Jesse Allen - 30 Aug, 2023 - Comments: 0

Siemens' Dan Yu examines hallucinations in large language models, the Universal Approximation Theorem, and the role they play in applying LLMs to EDA. Cadence's Mamta Rana introduces shared flow control in PCIe 6.0, which enables the reduced cost implementation of multiple virtual channels by allowing common sets of resources to be shared. Synopsys' Arturo Salz and Johannes Stahl note tha... » read more

New Concepts Required For Security Verification
By Brian Bailey - 28 Aug, 2023 - Comments: 0

Verification for security requires new practices in both the development and verification flows, but tools and methodologies to enable this are rudimentary today. Flows are becoming more complex, especially when they span multiple development groups. Security is special in that it is pervasive throughout the development process, requiring both positive and negative verification. Positive ver... » read more

AI, Rising Chip Complexity Complicate Prototyping
By Karen Heyman - 24 Aug, 2023 - Comments: 0

Prototyping, an essential technology for designing complex chips in tight market windows, is becoming significantly more challenging for the growing number of designs that include AI/ML. Prototyping remains one of the foundational pillars of the whole shift left movement, allowing software to be developed and tested before actual silicon is available. That, in turn, enables multiple teams t... » read more

The Power Of Computational Software: From Revolutionizing Chips To Cancer Research
By Reela Samuel - 24 Aug, 2023 - Comments: 0

This post is an excerpt from the keynote presentation at CadenceLIVE India, given by Nimish Modi, senior vice president and general manager of Strategy and New Ventures at Cadence. The semiconductor industry has grown significantly lately but follows a cyclical pattern marked by fluctuations. Currently, we are witnessing a macro-level correction aimed at resolving inventory imbalances. N... » read more

Accelerating Monte Carlo Simulations For Faster Statistical Variation Analysis, Debugging, And Signoff Of Circuit Functionality
By Cadence - 23 Aug, 2023 - Comments: 0

Over the years, semiconductor process nodes have been scaled aggressively, with device dimensions now approaching below 5nm. This, along with lower device operating voltages and currents, has allowed modern integrated circuits (ICs) and system-on-chip (SoC) designs to integrate more devices in a smaller chip area without compromising on lower power consumption and optimal performance. However, ... » read more

Using Data More Effectively In Chip Manufacturing
By Ed Sperling - 23 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss smart manufacturing and how tools and AI can enable it for semiconductors, with Mujtaba Hamid, general manager for product management for secure cloud environments at Microsoft; Vijaykishan Narayanan, vice president and general manager of India engineering and operations at proteanTecs; KT Moore, vice president of corporate ma... » read more

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2023 - Comments: 0

Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Week In Review: Design, Low Power
By SE Staff - 18 Aug, 2023 - Comments: 0

Synopsys’ board of directors appointed Sassine Ghazi as president and chief executive officer effective on Jan. 1, 2024. Ghazi, who is currently the COO, will succeed Aart de Geus, co-founder, chair, and CEO of Synopsys, who will then become the executive chair of board of directors. IBM Research introduced  an energy-efficient mixed-signal analog AI chip for DNN inferencing and demonstra... » read more

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