Unified AI/ML Solution Helps Accelerate Verification Curve


With the surge in usage requirements and increasing customer demands, hardware design is quickly becoming more complex. The rapid change in market trends, with a greater focus on technologies such as electric vehicles, dictates the demand for efficient power management and high-performance processing. Verification throughput continues to be a bottleneck as SoC designs increase in size, and so d... » read more

Blog Review: Feb. 8


Cadence's Sanjeet Kumar points to key changes and optimizations that are done for USB3 Gen T compared to USB3 Gen X tunneling in order to minimize tunnel overhead and maximize USB3 throughput. Siemens EDA's Harry Foster considers the effectiveness of IC and ASIC verification by looking at schedule overruns, number of required spins, and classification of functional bugs. Synopsys' Chris C... » read more

Chip Industry’s Earnings Roundup


Editor's Note: Updated throughout February 2023 for additional earnings releases. Many companies reported revenue growth in the most recent quarter, but the latest round of chip industry earnings releases reflected some major themes: Demand for consumer electronics softened due to inflation, rising interest rates, and post-pandemic market saturation, creating a slump in the memory chip ... » read more

Week In Review: Semiconductor Manufacturing, Test


Imec released its semiconductor roadmap, which calls for doubling compute power every six months to handle the data explosion and new data-intensive problems. Imec named five walls (scaling, memory, power, sustainability, cost) that need to be dismantled. The roadmap (below) stretches from 7nm to 0.2nm (2 angstroms) by 2036, and includes four generations of gate-all-around FETs followed by thre... » read more

Week in Review: Design, Low Power


Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. "Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools ... » read more

Automotive Growing In 2023


Automotive has to be one of the most fascinating industries where semiconductors and the semiconductor ecosystem are making huge strides. From the evolution of increasingly autonomous vehicles, to more immersive driver and passenger comfort and infotainment experiences, along with additional safety-related features, it’s a rich development environment. I recently had the opportunity to dis... » read more

Building Better Cars Faster


Carmakers are accelerating their chip and electronic design schedules to remain competitive in an increasingly fast-changing market, but they are encountering gaps in the tooling, the supply chain, and in the methodologies they use to create those cars. While it's easy to envision how CAD software could be used to create the next new vehicle’s 3-D look, and how simulation software helps de... » read more

Solving Problems With The IoT


The Internet of Things, a term once applied to almost any "smart" gadget connected to the Internet, is becoming more useful, more complex, and more of a security risk as the value of data continues to grow and more people depend on IoT technology. In the decades since the concept was first introduced, IoT devices have become so ubiquitous that applications cover practically every consumer, c... » read more

Automotive Security Vulnerabilities From Afar


Don't confuse automotive security with automotive safety, things like functional safety (FuSa) and ISO 26262. You need security to have safety. But security is its own thing. In a modern connected car, there are two places for security vulnerabilities. One is in the car itself. And the other is back at base in the automotive manufacturer's (OEM in the jargon) data centers, which the cars are co... » read more

Blog Review: Feb. 1


Siemens EDA's Harry Foster explores trends in low power design techniques for ICs and ASICs, with 72% of design projects reported actively managing power. Synopsys' Charlie Matar, Rita Horner, and Pawini Mahajan look at the concept of reliability, availability, and serviceability (RAS) in the context of high-performance computing SoC designs and how it can be supported with silicon lifecycle... » read more

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