tag: Carnegie Mellon University

Technical Paper Round-up: June 14
By Linda Christensen - 14 Jun, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=33 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

Deep Learning Applications For Material Sciences: Methods, Recent Developments
By Technical Paper Link - 10 Jun, 2022 - Comments: 0

New technical paper titled "Recent advances and applications of deep learning methods in materials science" from researchers at NIST, UCSD, Lawrence Berkeley National Laboratory, Carnegie Mellon University, Northwestern University, and Columbia University. Abstract "Deep learning (DL) is one of the fastest-growing topics in materials data science, with rapidly emerging applications spanning... » read more

Startup Funding: May 2022
By Jesse Allen - 06 Jun, 2022 - Comments: 0

May was another strong month for China as it continues its push to build a native semiconductor ecosystem. Over half the month's total funding went to startups in the country. Over half the companies funded were from China as well, including two FPGA companies, three making CPUs, a GPU startup, and numerous networking and wireless chip companies. Two of those, in FPGAs and CPUs, raised rounds s... » read more

Planning EDA’s Next Steps
By Ed Sperling - 24 Mar, 2022 - Comments: 0

Anirudh Devgan, Cadence's new CEO, and the recipient of the Phil Kaufman Award in December, sat down with Semiconductor Engineering to talk about what's next in EDA, the underlying technology and business challenges and changes, and new markets that are unfolding for floor-planning, verification, CFD, and advanced packaging. SE: Where does EDA need to improve? Devgan: We have made it much... » read more

Improving DRAM Performance, Security, and Reliability by Understanding and Exploiting DRAM Timing Parameter Margins
By Technical Paper Link - 14 Nov, 2021 - Comments: 0

Abstract: "Characterization of real DRAM devices has enabled findings in DRAM device properties, which has led to proposals that significantly improve overall system performance by reducing DRAM access latency and power consumption. In addition to improving system performance, a deeper understanding of DRAM technology via characterization can also improve device reliability and security. The... » read more

Manufacturing Bits: June 29
By Mark LaPedus - 29 Jun, 2021 - Comments: 0

Speeding up ALD with AI The U.S. Department of Energy’s (DOE) Argonne National Laboratory has developed various ways to make atomic layer deposition (ALD) more efficient by using artificial intelligence (AI). ALD is a deposition technique that deposits materials one layer at a time on chips. For years, ALD has been used for the production of DRAMs, logic devices and other products. In ... » read more

One-On-One: Lip-Bu Tan
By Ed Sperling - 26 May, 2021 - Comments: 0

Lip-Bu Tan, CEO of Cadence, sat down with Semiconductor Engineering to talk about the impact of massive increases in data across a variety of industries, the growing need for computational software, and the potential implications of U.S.-China relations. What follows are excerpts of that discussion. SE: What do you see as the biggest change for the chip industry? Tan: We're in our fifth g... » read more

Power/Performance Bits: May 10
By Jesse Allen - 10 May, 2021 - Comments: 0

Probabilistic bit Researchers at Tohoku University are working on building probabilistic computers by developing a spintronics-based probabilistic bit (p-bit). The researchers utilized magnetic tunnel junctions (MTJs). Most commonly used in MRAM technology, where thermal fluctuation typically poses a threat to the stable storage of information, in this case it was a benefit. The p-bits f... » read more

Power/Performance Bits: Sept. 22
By Jesse Allen - 22 Sep, 2020 - Comments: 0

Drawing sensors on skin Researchers from the University of Houston and University of Chicago created an ink pen that can draw multifunctional sensors and circuits directly on skin. These "drawn-on-skin electronics" aim to provide more precise health data, free of the artifacts that are associated with wearable devices and flexible electronic patches. Caused when the sensor doesn't move prec... » read more

3 Safety Standards For Auto Electronics
By Ed Sperling - 13 Jan, 2020 - Comments: 0

Kurt Shuler, vice president of marketing at Arteris IP, drills down into the three main safety standards, ISO 26262, SOTIF (Safety of the Intended Function) and UL 4600, what each one covers, what the intent is behind them, and what this means for companies developing technology for future vehicles. » read more

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