A New Breed Of Engineer

The industry loves to move in straight lines. Each generation of silicon is more-or-less a linear extrapolation of what came before. There are many reasons for this – products continue to evolve within the industry, adding new or higher performance interfaces, risk levels are lower when the minimum amount is changed for any chip spin, existing software is more likely to run with only minor mo... » read more

Co-Design For The AI Era

Welcome to the second piece in our blog series examining how the computing industry can work in new ways to enable the AI Era. In our first blog, my colleague Ellie Yieh described the enormous opportunities and challenges facing the industry as we enter a new decade, and she offered a path for accelerating innovation—from materials to systems—based on a “New Playbook” for driving im... » read more

Making Better Use Of Memory In AI

Steven Woo, Rambus fellow and distinguished inventor, talks about using number formats to extend memory bandwidth, what the impact can be on fractional precision, how modifications of precision can play into that without sacrificing accuracy, and what role stochastic rounding can play. » read more

Optimizing Power For Learning At The Edge

Learning on the edge is seen as one of the Holy Grails of machine learning, but today even the cloud is struggling to get computation done using reasonable amounts of power. Power is the great enabler—or limiter—of the technology, and the industry is beginning to respond. "Power is like an inverse pyramid problem," says Johannes Stahl, senior director of product marketing at Synopsys. "T... » read more

Save Time And Minimize Errors By Automating Co-Design And Co-Analysis Of Chips, PCBs, And Packages

Given the complexity of today’s chips, packages, and PCBs, designing each in isolation is no longer judicious. Cross-domain co-design and co-analysis are key to ensuring optimal performance, cost reduction, and faster time to market. Such capabilities are provided by the Cadence Virtuoso System Design Platform, which integrates IC design—including multiple heterogeneous die—into the Alleg... » read more

The (R)evolution Of Intelligent IP Subsystems

IP subsystems have gone from talking point to reality in a very short period of time, but most coverage focuses on a hardware integrators view. The system integrator’s view is very different because the task of software integration is now vastly more complex dealing with software from multiple providers, using different assumptions and with different requirements. This effort, already larger ... » read more

Software, From Zero To Hero

By Tom De Schutter As the amount of software in electronics applications continues to grow across many markets, from mobile phones to automotive hybrid systems, it is interesting to see how people portray this new-found dependency on software availability. I recently saw a presentation slide with the title: software delays products. Well, that’s one way of looking at it, but it’s a rather ... » read more

Keep The Silos

By Jon McDonald I’ve had a couple of conversations recently in which software developers expressed that they have little interest in working with hardware or systems developers. The general sentiment seemed to be “when [a place commonly regarded as extremely hot] freezes over” they might consider it. Perhaps for those living in northern climates there may be a possibility of this freeze,... » read more

Smarter Co-design With Models

By Ann Steffora Mutschler IC, package and PCB co-design methodologies are starting to be adopted by semiconductor companies. However, the existing die abstract file used in these flows to exchange data between the IC designer and the downstream package design team may not contain enough detail to drive advanced planning and optimization with the package and PCB interfaces. Engineering teams... » read more

Experts At The Table: Hardware-Software Co-Design

By Ed Sperling System-Level Design sat down to discuss hardware-software co-design with Frank Schirrmeister, group marketing director for Cadence’s System and Software Realization Group; Shabtay Matalon, ESL market development manager at Mentor Graphics; Kurt Shuler, vice president of marketing at Arteris; Narendra Konda, director of hardware engineering at Nvdia; and Jack Greenbaum, direct... » read more

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