Week In Review: Manufacturing, Test


Packaging Amkor plans to build a packaging plant in Bac Ninh, Vietnam. The first phase of the new factory will focus on providing system-in-package (SiP) assembly and test services for customers. The investment for the first phase of the facility is estimated to be between $200 million and $250 million. “This is a strategic, long-term investment in geographical diversification and factory... » read more

Week In Review: Manufacturing, Test


Chipmakers After years in the works, GlobalFoundries is finally a public company. But on its first day of trading on Thursday (Oct. 28), shares of the foundry vendor slipped a bit. GF finished its first day of trading at $46.40. This compares to the $47 per share it priced in the initial public offering (IPO), according a report to Reuters. The chipmaker has a market capitalization of about $2... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC posted its results for the quarter and confirmed its long-awaited plans to build a fab in Japan. It’s not a leading-edge fab, but rather a plant for 28nm/22nm processes. “The company confirmed plans to build a new fab in Japan for 22nm + 28nm,” said Aaron Rakers, an analyst at Wells Fargo, in a research note. “An average 22/28nm fab costs ~$4-5B range per 45k wspm. Fab ... » read more

Inspecting, Testing, And Measuring SiC


Achieving the auto industry's stringent zero defect goals is becoming a big challenge for makers of silicon carbide substrates, which are struggling to achieve sufficient yields and reliability as they migrate from 150mm to 200mm wafers and shift their focus away from pure silicon. SiC is a combination of silicon and harder carbide materials, and it has emerged as a key technology for batter... » read more

PCB And IC Technologies Meet In The Middle


Surface-mount technology (SMT) is evolving far beyond its roots as a way of assembling packaged chips onto printed circuit boards without through-holes. It is now moving inside packages that will themselves be mounted on PCBs. But SMT for advanced packages isn’t the same as the SMT we’ve been used to. “Many systems include multiple ASICs, a lot of memory, and that's all integrated i... » read more

Growing Challenges With Wafer Bump Inspection


As advanced packaging goes mainstream, ensuring that wafer bumps are consistent has emerged as a critical concern for foundries and OSATs. John Hoffman, computer vision engineering manager at CyberOptics, talks about the shift toward middle-of-line and how that is affecting inspection and metrology, why there is so much concern over co-planarity and alignment, how variation can add up and creat... » read more

New Memories Add New Faults


New non-volatile memories (NVM) bring new opportunities for changing how we use memory in systems-on-chip (SoCs), but they also add new challenges for making sure they will work as expected. These new memory types – primarily MRAM and ReRAM – rely on unique physical phenomena for storing data. That means that new test sequences and fault models may be needed before they can be released t... » read more

Addressing High Precision Automated Optical Inspection Challenges With Unique 3D Technology Solution


Driven by the continued decrease in the size of electronics packaging, combined with the increase in density, there is a critical need for highly accurate 3D inspection for defect detection. Using multi-view 3D sensors and parallel projection, it is possible to capture more of the board at a faster rate as compared to serial image acquisition, which is more time consuming. Precise 3D image r... » read more

Fabs Drive Deeper Into Machine Learning


Advanced machine learning is beginning to make inroads into yield enhancement methodology as fabs and equipment makers seek to identify defectivity patterns in wafer images with greater accuracy and speed. Each month a wafer fabrication factory produces tens of millions of wafer-level images from inspection, metrology, and test. Engineers must analyze that data to improve yield and to reject... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs Reports have surfaced that TSMC has delayed its 3nm process. But TSMC says the technology remains on track. Volume production for TSMC’s 3nm is still scheduled for the second half of 2022. On the flip side, there is speculation that TSMC may increase its wafer prices by up to 20%, according to a report from the Taipei Times. Here's another report. This is due to chip shortag... » read more

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