Not All There: Heterogeneous Multiprocessor Design Tools


The design, implementation, and programming of multicore heterogeneous systems is becoming more common, often driven by the software workloads, but the tooling to help optimize the processors, interconnect, and memory are disjointed. Over the past few years, many tools have emerged that help with the definition and implementation of a single processor, optimized for a given set of software. ... » read more

Revolutionizing Product Development And User Experience: The Transformative Power Of Generative AI


Generative AI has become a prominent and versatile solution across various domains, including chip and system development. Its progress and impact have outpaced many other technological advancements, significantly benefiting numerous areas. In the semiconductor industry, EDA tools with generative AI have already established their position by offering unparalleled optimization capabilities. Thes... » read more

L31 Embedded Core Extensions For Wireless And Connectivity


5G is the latest generation of cellular networks using the 3rd Generation Partnership Project (3GPP) 5G New Radio air interface. Unlike previous generations of network (2G, 3G & 4G), which had a one-size-fits-all approach, 5G aims to address a wide range of very different applications. To flexibly support diverse quality of service requirements, network slicing is introduced to enable multip... » read more

Smart Manufacturing Makes Gains In Chip Industry


Lights out manufacturing is gaining steam across the semiconductor industry, accelerating productivity, improving quality, and reducing costs and environment impact. These benefits are the result of years of strategic investments in technologies like machine-to-machine communication, data analytics, and robotics to achieve higher levels of autonomy. Semiconductor factories have long depen... » read more

ESD Co-Design For High-Speed SerDeS In FinFET Technologies


An electronic device is susceptible to Electrostatic Discharge (ESD) damage during its entire life cycle, including the phase from the completion of the silicon wafer processing to when the device (die) is assembled in the system. To avoid yield loss due to ESD damage during this early phase, on-chip ESD protection measures are applied to provide a certain degree of ESD robustness. The componen... » read more

Welcome To EDA 4.0 And The AI-Driven Revolution


By Dan Yu, Harry Foster, and Tom Fitzpatrick Welcome to the era of EDA 4.0, where we are witnessing a revolutionary transformation in electronic design automation driven by the power of artificial intelligence. The history of EDA can be delineated into distinct periods marked by significant technological advancements that have propelled faster design iterations, improved productivity, and fu... » read more

Chip Design CEO Outlook


Semiconductor Engineering sat down with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business Unit; Niels Faché, vice president and general manager of PathWave Software Solutions at Keysight; Dean Drako, president and CEO of IC M... » read more

RL-Guided Detailed Routing Framework for Advanced Custom Circuits


A technical paper titled "Reinforcement Learning Guided Detailed Routing for Custom Circuits" was published by researchers at UT Austin, Princeton University, and NVIDIA. "This paper presents a novel detailed routing framework for custom circuits that leverages deep reinforcement learning to optimize routing patterns while considering custom routing constraints and industrial design rules. C... » read more

Making Tradeoffs With AI/ML/DL


Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

Engineering Simulation Workloads And The Rise of the Cloud


Cloud service providers (CSPs) continue to improve the performance capabilities of their non-accelerated and accelerated compute instances, as well as augment their HPC infrastructure with domain-area expertise of targeted HPC workloads. Additionally, engineers, researchers, and scientists are becoming more comfortable with the types of workloads that can be run in the cloud within acceptable w... » read more

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