Challenges Of Using The Cloud For IC Design

By Srinath Anantharaman - 04 Mar, 2021 - Comments: 0

The ‘cloud’ is so ubiquitous that perhaps even your grandmother has heard about it. There are advertisements on TV with various vendors touting their cloud offerings. The cloud is ideal for eCommerce and SaaS (Software as a Service) offerings, as the elasticity on demand provides a convenient way to scale up when demand is high and scale down when it is low. Yet the design community has ... » read more

When Is Verification Done?

By Ann Mutschler - 25 Feb, 2021 - Comments: 0

Even with the billions of dollars spent on R&D for EDA tools, and tens of billions more on verification labor, only 30% to 50% of ASIC designs are first time right, according to Wilson Research Group and Siemens EDA. Even then, these designs still have bugs. They’re just not catastrophic enough to cause a re-spin. This means more efficient verification is needed. Until then, verificati... » read more

The Problem With Benchmarks

By Brian Bailey - 11 Feb, 2021 - Comments: 1

Benchmarks long have been used to compare products, but what makes a good benchmark and who should be trusted with their creation? The answer to those questions is more difficult than it may appear on the surface, and some benchmarks are being used in surprising ways. Everyone loves a simple, clear benchmark, but that is only possible when the selection criteria are equally simple. Unfortuna... » read more

Roaring ’20s For The Chip Industry

By Brian Bailey - 28 Jan, 2021 - Comments: 0

2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

Big Changes In Verification

By Ann Mutschler - 28 Jan, 2021 - Comments: 0

Verification is undergoing fundamental change as chips become increasingly complex, heterogeneous, and integrated into larger systems. Tools, methodologies, and the mindset of verification engineers themselves are all shifting to adapt to these new designs, although with so many moving pieces this isn't always so easy to comprehend. Ferreting out bugs in a design now requires a multi-faceted... » read more

Achieving Physical Reliability Of Electronics With Digital Design

By John Parry - 14 Jan, 2021 - Comments: 0

By John Parry and G.A. (Wendy) Luiten With today’s powerful computational resources, digital design is increasingly used earlier in the design cycle to predict zero-hour nominal performance and to assess reliability. The methodology presented in this article uses a combination of simulation and testing to assess design performance, providing more reliability and increased productivity. ... » read more

Imec’s Plan For Continued Scaling

By Paul McLellan - 14 Jan, 2021 - Comments: 0

At IEDM in December, the opening keynote (technically "Plenary 1") was by Sri Samevadam of Imec. His presentation was titled "Towards Atomic Channels and Deconstructed Chips." He presented Imec's view of the future of semiconductors going forward, both Moore's Law (scaling) and More than Moore (advanced packaging and multiple die). It is always interesting to hear Imec's view of the world sinc... » read more

Realize A More Productive EDA Environment From HPE With AMD

By Ansys - 13 Jan, 2021 - Comments: 0

Few industries are more competitive than modern electronics manufacturing and chip design. Consumers expect devices to be faster, cheaper, and more reliable with each generation. Whether large or small, electronics manufacturers rely on electronic design automation (EDA) to enable these improvements. Click here to access the white paper. » read more

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms for Better End-to-End Results

By Synopsys - 13 Jan, 2021 - Comments: 0

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new, ML-driven capabilities can be embedded in different design engines, gi... » read more

EDA, IP Revenue Up 15%

By Ed Sperling - 11 Jan, 2021 - Comments: 2

EDA and IP revenues blasted off in Q3 of 2020 in every geography and every sector, despite a trade war, a pandemic, and slowdowns in the automotive and avionics sectors. Revenue grew to $2.95 billion, up 15% over the $2.57 billion in the same period in 2019, according to a just-released report from the Electronic System Design Alliance Market Statistic Services (MSS). The four-quarter moving... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.