tag: EUV

Fast Local Registration Measurements For Efficient E-beam Writer Qualification And Correction
By KLA - 09 Apr, 2019 - Comments: 0

By Klaus-Dieter Roeth, Hendrik Steigerwald, Runyuan Han, Oliver Ache, Frank Laske (KLA-Tencor MIE GmbH, Germany) Abstract Mask data are presented which demonstrate local registration errors that can be correlated to the writing swathes of state-of-the-art e-beam writers and multi-pass strategies, potentially leading to systematic device registration errors versus design of close to 2nm. Fur... » read more

Improving SAQP Patterning Yield Using Virtual Fabrication And Advanced Process Control
By Benjamin Vincent - 25 Mar, 2019 - Comments: 0

Advanced logic scaling has created some difficult technical challenges, including a requirement for highly dense patterning. Imec recently confronted this challenge, by working toward the use of Metal 2 (M2) line patterning with a 16 nm half-pitch for their 7nm node (equivalent to a 5nm foundry node). Self-Aligned Quadruple Patterning (SAQP) was investigated as an alternative path to Extreme Ul... » read more

Single Vs. Multi-Patterning EUV
By Mark LaPedus - 25 Mar, 2019 - Comments: 5

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

EUV Arrives, But More Issues Ahead
By Katherine Derbyshire - 21 Mar, 2019 - Comments: 5

EUV has arrived. After decades of development and billions of dollars of investment, EUV lithography is taking center stage at the world’s leading fabs. More than 20 years after ASML's extreme ultraviolet lithography research program began, and nearly a decade after its first pre-production exposure tools, the company expects to deliver 30 EUV exposure systems in 2019. That is nearly doubl... » read more

EUV Mask Readiness Challenges
By Mark LaPedus - 21 Mar, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss extreme ultraviolet (EUV) lithography and photomask technologies with Emily Gallagher, principal member of the technical staff at Imec; Harry Levinson, principal at HJL Lithography; Chris Spence, vice president of advanced technology development at ASML; Banqiu Wu, senior director of process development at Applied Materials; and Aki Fujimura, chief ... » read more

Manufacturing Bits: March 11
By Mark LaPedus - 11 Mar, 2019 - Comments: 0

Measuring molecules The Technical University of Munich (TUM) has developed a new metrology technique that determines the properties of individual molecules. The technique, called single-molecule excitation–emission spectroscopy, improves upon the traditional methods to explore molecules. The traditional method, dubbed single-molecule spectroscopy (SMS), is not new and is used to analyze f... » read more

Using Sensor Data To Improve Yield And Uptime
By Ed Sperling - 21 Feb, 2019 - Comments: 2

Semiconductor equipment vendors are starting to add more sensors into their tools in an effort to improve fab uptime and wafer yield, and to reduce cost of ownership and chip failures. Massive amounts of data gleaned from those tools is expected to provide far more detail than in the past about multiple types and sources of variation, including when and where that variation occurred and how,... » read more

Comparative Stochastic Process Variation Bands For N7, N5, And N3 At EUV
By KLA - 21 Feb, 2019 - Comments: 0

By Alessandro Vaglio Preta, Trey Gravesa, David Blankenshipa, Kunlun Baib, Stewart Robertsona, Peter De Bisschopc, John J. Biaforea a) KLA-Tencor Corporation, Austin, TX 78759, U.S.A. b) KLA-Tencor Corporation, Milpitas, CA 95035, U.S.A. c) IMEC, Kapeldreef 75, 3000, BE ABSTRACT Stochastics effects are the ultimate limiter of optical lithography technology and are a major concern for n... » read more

EDA Grabs Bigger Slice Of Chip Market
By Brian Bailey - 31 Jan, 2019 - Comments: 0

EDA revenues have been a fairly constant percentage of semiconductor revenues, but that may change in 2019. With new customers creating demand, and some traditional customers shifting focus from advanced nodes, the various branches of the EDA tool industry may be where sticky technical problems are solved. IC manufacturing, packaging and development tools all are finding new ways to handle t... » read more

What’s Next For AI, Quantum Chips
By Mark LaPedus - 24 Jan, 2019 - Comments: 1

Semiconductor Engineering sat down to discuss the latest R&D trends with Luc Van den hove, president and chief executive of Imec; Emmanuel Sabonnadière, chief executive of Leti; and An Chen, executive director for the Nanoelectronics Research Initiative at the Semiconductor Research Corp. (SRC). Chen is on assignment from IBM. What follows are excerpts of those conversations, which took pl... » read more

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