tag: field programmable gate arrays

Enabling Scalable Accelerator Design On Distributed HBM-FPGAs (UCLA)
By Technical Paper Link - 06 Dec, 2023 - Comments: 0

A technical paper titled “TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs” was published by researchers at University of California Los Angeles. Abstract: "Despite the increasing adoption of Field-Programmable Gate Arrays (FPGAs) in compute clouds, there remains a significant gap in programming tools and abstractions which can leverage network-connected, cloud-scale... » read more

A HIL Methodology For The SoC Development Flow
By Technical Paper Link - 14 Nov, 2023 - Comments: 0

A technical paper titled “Virtual-Peripheral-in-the-Loop : A Hardware-in-the-Loop Strategy to Bridge the VP/RTL Design-Gap” was published by researchers at University of Bremen and German Research Center for Artificial Intelligence (DFKI). Abstract: "Virtual Prototypes act as an executable specification model, offering a unified behavior reference model for SW and HW engineers. However, b... » read more

Designing for FPGA Accelerators
By Technical Paper Link - 31 Aug, 2022 - Comments: 0

This research paper titled "High-Level Synthesis Hardware Design for FPGA-based Accelerators: Models, Methodologies, and Frameworks" was published by researchers at Università degli Studi di Trieste (Italy), Universidad Nacional de San Luis (Argentina), and the Abdus Salam International Centre for Theoretical Physics (Italy). According to the paper's abstract, "This paper presents a survey ... » read more

Xilinx AI Engines And Their Applications
By Xilinx - 31 Mar, 2021 - Comments: 0

This white paper explores the architecture, applications, and benefits of using Xilinx's new AI Engine for compute intensive applications like 5G cellular and machine learning DNN/CNN. 5G requires between five to 10 times higher compute density when compared with prior generations; AI Engines have been optimized for DSP, meeting both the throughput and compute requirements to deliver the hig... » read more

RT Kintex UltraScale FPGAs For Ultra High Throughput And High Bandwidth Applications
By Xilinx - 01 Dec, 2020 - Comments: 0

Xilinx's UltraScale architecture extends FPGA capability for space applications, delivering a step-function increase in I/O and memory bandwidth, capacity, performance, and in-orbit re-configurability. For the first time, the RT Kintex UltraScale XQRKU060 FPGA enables the satellite industry to access ultra-high throughput on-board processing of hundreds of Gb/s. This capability allows spacecraf... » read more

Versal: The First Adaptive Compute Acceleration Platform (ACAP)
By Xilinx - 01 Dec, 2020 - Comments: 0

Recent technical challenges have forced the industry to explore options beyond the conventional “one size fits all” CPU scalar processing solution. Very large vector processing (DSP, GPU) solves some problems, but it runs into traditional scaling challenges due to inflexible, inefficient memory bandwidth usage. Traditional FPGA solutions provide programmable memory hierarchy, but the tradit... » read more

The Best Platform When It Comes To PTP Accuracy
By Xilinx - 01 Dec, 2020 - Comments: 0

Synchronization is pervasive in most industry sectors, including finance, telecom, industrial, consumer, and aerospace and defense. All of these markets have several applications that rely on synchronization. The first part of this white paper describes a few typical examples where synchronization enables applications that would not be possible otherwise. Synchronization can be achieved with... » read more

Xilinx Reduces Risk And Increases Efficiency For IEC61508 And ISO26262 Certified Safety Applications
By Xilinx - 01 Dec, 2020 - Comments: 0

This white paper introduces key dependability aspects for industrial and automotive customers who are designing and developing programmable electronic equipment for safety applications using Xilinx FPGA and SoC devices. The main focus of this white paper is to explain how to create solutions with highly integrated, high-performance certifiable systems that target IEC 61508 / ISO 26262 norms. Th... » read more

HDL Simulation Acceleration Solution For Microchip FPGA Designs
By Aldec - 23 Nov, 2020 - Comments: 0

Mission-critical FPGA designs for space and radar applications continue to increase in complexity, such that they require a comprehensive and robust verification environment. There are hardware-in-the-loop solutions in the market that utilize FPGA boards, but when it comes to establishing functional coverage and debugging the custom logic, users would typically need to go back to HDL simulation... » read more

Clarifying Language/Methodology Confusion
By Aldec - 28 Oct, 2020 - Comments: 0

Engineers working on modern, large FPGA designs face multiple challenges: changing languages, methodologies and tools implementing them. The fact that many designs now contain both hardware and software only add to the confusion. This document tries to clarify the situation. Click here to read more. » read more

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