tag: finFETs

How To Reduce Implementation Headaches In FinFET Processes
By Leah Schuth - 11 Sep, 2014 - Comments: 0

In this era of compressed market windows and shrinking or changing technology, today’s engineers are always looking for ways to improve their overall product performance, power and area (PPA), while also decreasing their SoC design effort. The goal is to ease time-consuming and labor-intensive implementation tasks that will yield a reduction in design time, without sacrificing accuracy and op... » read more

Advances In Power Management For Physical IP In 28nm And FinFET Process Nodes
By Navraj Nandra - 11 Sep, 2014 - Comments: 0

Engineering techniques to reduce power consumption by lowering the supply voltage and slowing the clock speed have reached practical limits of the semiconductor technologies. Newer solutions, which not only reduce power but also actively manage the power during the course of the SoC (system on chip) activity, are emerging. This article describes these innovations from the foundation intellectua... » read more

The Week In Review: Design
By Ed Sperling - 05 Sep, 2014 - Comments: 0

Tools Mentor Graphics unveiled a hypervisor with configuration, debugging and hardware support. The solution is aimed at a variety of vertical markets, ranging from industrial and medical to consumer electronics. NXP uncorked a passive Inter-Integrated Circuit (I²C) solution for near-field communications tagging, allowing appliances, wearables and consumer electronics to use existing NFC-... » read more

Different Approaches Emerge For Stacking Die
By Ed Sperling - 21 Aug, 2014 - Comments: 1

The concept of stacking die to shorten wires, improve performance, and reduce the amount of energy required to drive signals has been in research for at least the past dozen years at both IBM and Intel. And depending upon whom you ask, it could be another 2 to 10 years before it becomes a mainstream packaging approach—if it happens at all. At least part of the confusion stems from how you ... » read more

Executive Insight: Jack Harding
By Ed Sperling - 18 Aug, 2014 - Comments: 0

SE: What’s worrying you these days? Harding: One thing that bothers me is the cost of chip development on a per-chip basis. We seduce ourselves into thinking everything is wonderful because the cost per transistor is dropping in chunks. Gate costs are going down at every node. If you look at the secular trend, we’ve done a pretty good job putting a lot of stuff in a small space. In my bu... » read more

The Week In Review
By Ed Sperling - 15 Aug, 2014 - Comments: 0

Applied Materials announced its fiscal Q3 results. Net sales for the quarter were $2.27 billion compared with $1.98 billion in the same period in 2013, a 15% increase. Net income was $301 million for the period, compared with $168 million in 2013. On a non-GAAP basis, net income was $349 million, compared with $222 million in Q3 2013. The company expects fiscal Q4 net sales to be flat, plus or ... » read more

Ion Implanter Market Heats Up
By Mark LaPedus - 14 Aug, 2014 - Comments: 0

The ion implanter market has been a stable, if not a sleepy, business. The last big event took place in 2011, when Applied Materials re-entered the ion implanter market by acquiring Varian, the world’s leading supplier of these tools. The acquisition gave Applied Materials a commanding 80% share of the implanter business, with the other players fighting for the crumbs. But after year... » read more

Why The Next Couple Process Nodes Are So Critical
By Ed Sperling - 14 Aug, 2014 - Comments: 0

In the greater scheme of things, one process node doesn't matter all that much. In fact, it has become common practice for big chipmakers to skip nodes for some of their chips as power issues becoming increasingly complex, time-to-market windows shrink and leapfrogging is viewed as a way to maximize resources while remaining über-competitive. But the next process node, and certainly the nex... » read more

FinFET Ramp: Changing Market Dynamics?
By Joanne Itow - 14 Aug, 2014 - Comments: 1

Rolling out a new semiconductor technology always has its share of challenges, but it seems like the 14nm finFET process node is starting off with more than its share of delays and speculation. This week Intel revealed some of the details for its new microarchitecture, Broadwell, and their first product, the Intel Core M processor, to be manufactured using their second-generation finFET, 14... » read more

Who’s Winning The FinFET Foundry Race?
By Mark LaPedus - 14 Aug, 2014 - Comments: 5

The leading-edge foundry business is challenging. For starters, foundry vendors require vast resources, gigantic fabs and lots of know-how. And yet, it’s still difficult to make money in this business. That has certainly proven to be the case in the planar transistor era, but the challenges and costs are escalating as foundry vendors begin to ramp up finFET technologies at the 16nm/14nm no... » read more

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