tag: finFETs

New Challenges Emerge With FinFETs
By Ed Sperling - 05 Dec, 2013 - Comments: 0

Working at advanced process nodes is always tricky. There are new things to worry about and more rules to deal with initially, yet the promised benefit is improved performance, power and area, or cost. But at the next process node, and the one after that, there are so many variables coming into play that trying to make sense of the PPA equation is becoming much more difficult. Early reports ... » read more

How Reliable Are Interconnects In 16nm FinFET Designs?
By Arvind Vel - 05 Dec, 2013 - Comments: 0

The 16nm FinFET process node is rapidly becoming the preferred choice for advanced Integrated Circuit (IC) designs. The 16nm node’s lower standby leakage characteristics and increased drive strength capability enable IC designers to push the boundaries of low power – high performance designs. However, the choice of the node is also accompanied by reduced reliability margins, requiring desig... » read more

Seven Ways To Improve PPA Before Moving To FinFETs
By Ed Sperling - 05 Dec, 2013 - Comments: 0

Henry Ford wrote in his autobiography, “Any customer can have a car painted any color that he wants so long as it is black.” And for decades, the semiconductor industry has marched to a similar theme set by Moore’s Law. But with the transition to finFETs harder than it first appeared, questions are beginning to pop up that is fueling a new level of confusion. While the growing list of... » read more

The Next Dimension
By Ed Sperling - 14 Nov, 2013 - Comments: 0

It’s hard to say definitively whether this is a trend or an aberration, but after what appears to have been a slam-dunk sprint to the finish line with finFETs some companies are re-evaluating their alternatives based upon return on investment. In place of perpetually shrinking features—and looming multipatterning at the next node—there is renewed interest in staying at 28nm with FDSOI,... » read more

The Week In Review: Manufacturing & Design
By Mark LaPedus - 08 Nov, 2013 - Comments: 0

GT Advanced Technologies has entered into a multi-year supply agreement with Apple for sapphire materials. GT will own and operate its furnaces and related equipment to produce the sapphire materials at an Apple-owned facility in Arizona. GT expects to employ more than 700 people in the facility. Apple will provide GT with a prepayment of about $578 million. “We believe Apple likely has signi... » read more

FinFET Impacts For Reducing Physical IP Power Consumption
By Navraj Nandra - 07 Nov, 2013 - Comments: 0

FinFET devices were developed to address the need for improved gate control to suppress leakage current (IOFF); DIBL (drain-induced barrier lowering); and process‐induced variability below 32-nanometer. FinFET technology is now in volume production. To fully realize the advantages of FinFET devices, physical IP must follow the same trajectory that has benefited digital design. That include... » read more

Paving The Way To 16/14nm
By Ed Sperling - 07 Nov, 2013 - Comments: 0

The move to the next stop on the Moore’s Law road map isn’t getting any less expensive or easier, but it is becoming more predictable. Tools and programs are being expanded to address physical effects such as electrostatic discharge (ESD), electromigration and thermal effects from increased current density. Any or all of these three checklist items can affect the reliability of a chip. A... » read more

Tech Talk: 16nm-14nm Effects And Challenges
By Ed Sperling - 06 Nov, 2013 - Comments: 0

Arvind Shanmugavel from Apache Design talks with Semiconductor Engineering about electromigration, electrostatic discharge and thermal effects caused by increasing power density in finFETs.   [youtube vid=GOra5uYyIr8] » read more

Uncertainty, But Not Over Power
By Ed Sperling - 25 Oct, 2013 - Comments: 0

The semiconductor industry has reached a crossroads. Lithography has stalled out, NRE is rising, and chipmakers are torn between choices of when and whether to jump to the next process node—and even more daunting, the next one after that—or whether to take half steps with fan outs, 2.5D, or fully depleted SOI. While chips do continue to tape out, the number of critical choices that need... » read more

Applied-TEL Watch
By Mark LaPedus - 17 Oct, 2013 - Comments: 0

By Mark LaPedus So far this year, the biggest story in the fab tool industry is fairly obvious—Applied Materials recently signed a definitive agreement to acquire rival Tokyo Electron Ltd. (TEL) for about $9.3 billion. The blockbuster announcement will likely be the top story of 2013. Of course, the integration of Applied and TEL will be a challenge. In any case, the Applied-TEL deal is i... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy