The Next Generation Of Embedded FPGA


EFLX eFPGA has been in use in SoCs for more than 5 years, hardware and software. More than 40 chips have been licensed to use EFLX eFPGA and more than 20 chips are working in silicon. Big customers like Renesas are planning high volumes and families of chips using eFPGA. As we have worked with customers our architecture has evolved from EFLX Gen 1.0 to Gen 2.0, 2.1, 2.2, 2.3 and now in 2023 ... » read more

Solving The Last-Mile Delivery Problem


Retailers are deploying robots to cut costs and improve efficiency, opening new opportunities for chipmakers as well as a host of new challenges. Key to this strategy are autonomous roadside delivery robots (ARDRs). Retailers have been facing razor-thin profit margins for years and have turned their sights to increasing operational efficiency to stay competitive. Solving the last-mile delive... » read more

Security Becomes Much Bigger Issue For AI/ML Chips, Tools


Security is becoming a bigger issue in AI and machine learning chips, in part because the chip industry is racing just to get new devices working, and in part because it's difficult to secure a new technology that is expected to adapt over time. And unlike in the past, when tools and methodologies were relatively fixed, nearly everything is in motion. Algorithms are being changed, EDA tools ... » read more

Fully Reconfigurable DSP: As Fast As Hardwired At ~2x Area/Power


Today if you want high performance DSP you have three choices: Hardwire your function – zero flexibility Use DSP IP based on VLIW Use FPGAs with DSP MACs or math engines What we hear from customers is that there is a growing need for very fast and very flexible DSP, which hardwired solutions can’t address. And that the fastest solutions are FPGAs, but they are big, high pow... » read more

Modular FPGA Makes FPGA Easier To Use


Traditionally FPGAs are configured once at boot/power-on. This is because they almost always store the configuration file in a Flash memory which is updated from time to time (like your smart phone’s OS and apps). But eFPGA is in your SoC, so you can provide the configuration files from on chip SRAM, on chip NVM and/or off chip DRAM. EFLX eFPGA is reconfigurable. Process nodes like 40nm... » read more

Software-Defined Hardware Architectures


Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

Improving Image Resolution At The Edge


How much cameras see depends on how accurately the images are rendered and classified. The higher the resolution, the greater the accuracy. But higher resolution also requires significantly more computation, and it requires flexibility in the design to be able to adapt to new algorithms and network models. Jeremy Roberson, technical director and software architect for AI/ML at Flex Logix, talks... » read more

Week In Review: Auto, Security, Pervasive Computing


The U.S. Cybersecurity and Infrastructure Security Agency (CISA) issued a cybersecurity warning about Chinese state-sponsored activity impacting networks across U.S. critical infrastructure. “One of the actor’s primary tactics, techniques, and procedures (TTPs) is living off the land, which uses built-in network administration tools to perform their objectives," the agency said. Hacking eff... » read more

Machine Vision Plus AI/ML Adds Vast New Opportunities


Traditional technology companies and startups are racing to combine machine vision with AI/ML, enabling it to "see" far more than just pixel data from sensors, and opening up new opportunities across a wide swath of applications. In recent years, startups have been able to raise billions of dollars as new MV ideas come to light in markets ranging from transportation and manufacturing to heal... » read more

Holistic Power Reduction


The power consumption of a device is influenced by every stage of the design, development, and implementation process, but identifying opportunities to save power no longer can be just about making hardware more efficient. Tools and methodologies are in place for most of the power-saving opportunities, from RTL down through implementation, and portions of the semiconductor industry already a... » read more

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