“Make in India”

By SEMI - 19 Mar, 2015 - Comments: 0

By Bettina Weiss In recent weeks, I have been talking to SEMI members and other stakeholders about India. Some consider any semiconductor industry development in the country a dream. Others are looking more closely at current indicators of something real and tangible, trying to determine whether to get involved. The electronics sector in India will have to satisfy a huge demand growth... » read more

Why The Next Couple Process Nodes Are So Critical

By Ed Sperling - 14 Aug, 2014 - Comments: 0

In the greater scheme of things, one process node doesn't matter all that much. In fact, it has become common practice for big chipmakers to skip nodes for some of their chips as power issues becoming increasingly complex, time-to-market windows shrink and leapfrogging is viewed as a way to maximize resources while remaining über-competitive. But the next process node, and certainly the nex... » read more

Who’s Winning The FinFET Foundry Race?

By Mark LaPedus - 14 Aug, 2014 - Comments: 5

The leading-edge foundry business is challenging. For starters, foundry vendors require vast resources, gigantic fabs and lots of know-how. And yet, it’s still difficult to make money in this business. That has certainly proven to be the case in the planar transistor era, but the challenges and costs are escalating as foundry vendors begin to ramp up finFET technologies at the 16nm/14nm no... » read more

IP Integration Challenges Rising

By Ann Mutschler - 24 Jul, 2014 - Comments: 0

It’s not just [getkc id="80" comment="lithography"] that is putting a crimp in sub-28nm designs. As more functions, features, transistors and software are added onto chips, the pressure to get chips out the door has forced chipmakers to lean more heavily on third-party IP providers. Results, as you might expect, have been mixed. The number of blocks has mushroomed, creating its own web of ... » read more

Foundries Versus OSATs

By Ed Sperling - 24 Jul, 2014 - Comments: 2

Since the 1990s, commercial foundries have ruled semiconductor manufacturing while the [getkc id='83' comment='OSAT'] providers (OSATs) have dominated IC packaging and testing. But as the industry moves toward stacked die over the next couple of years, and big foundries see a chance to expand their reach, the stage is set for an all-out war. There is much at stake on both sides. Foundries g... » read more

Stacked Die Are Coming Soon. Really

By Ed Sperling - 10 Jul, 2014 - Comments: 3

Since the beginning of the decade there have been many predictions that stacked die were just over the hill, but the time it has taken to climb that hill has been longer than most people would have anticipated. In fact, TSMC has been fully capable of building stacked die since last year, with risk production expected to be completed by year, according to Gartner. But something very fundament... » read more

Follow The Investments

By Ed Sperling - 24 Apr, 2014 - Comments: 0

Where is design heading over the next few years. The best way to tell that is to find out where the development dollars are going, and foundries and tools always precede actual designs. The foundries are starting to spend money—lots of it—on finFETs and 28nm. And while they’re talking about 2.5D and 3D, the money isn’t going there just yet. In fact, there are two different processes ... » read more

More Pain In More Places

By Ed Sperling - 14 Mar, 2014 - Comments: 2

Pain is nothing new in to the semiconductor industry. In fact, the pain of getting complex designs completed on budget, and finding the bugs in those designs, has been responsible for decades of continuous growth in EDA, IP, test, packaging, and foundries. But going forward there is change afoot in every segment of the flow from architecture to design to layout to verification to manufacturi... » read more

Experts At The Table: Yield And Reliability Issues With Integrating IP

By Ed Sperling - 08 Jan, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the impact of integrating IP in complex SoCs with Juan Rey, senior director of engineering at Mentor Graphics; Kevin Yee, product marketing director for Cadence’s SoC Realization Group; and Mike Gianfagna, vice president of marketing at eSilicon. What follows are excerpts of that conversation. SE: Do we need to move to subsystems or more restri... » read more

Experts At The Table: 450mm Fab And Facilities Challenges

By Mark LaPedus - 18 Jul, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future 450mm fab and facilities challenges with Gerald Goff, director of the project management office for fab design and construction at GlobalFoundries; Joe Cestari, president of Total Facility Solutions; Ivo Raaijmakers, chief technology officer of ASM International; and Michael Brain, senior director of the Fab S... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: foundries