tag: Fraunhofer IIS EAS

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 29 Oct, 2021 - Comments: 0

Automotive The automotive chip shortage is still affecting automotive OEMs. U.S. automakers Ford and GM reported lower 3rd quarter income year over year related to the chip shortage. They, as well as other automotive OEMs around the world, have had to temporarily shut assembly lines down when chips were not available. Infineon Technologies signed a memorandum of understanding with Hyundai M... » read more

What’s Next For Emulation
By Brian Bailey - 28 Oct, 2021 - Comments: 1

Emulation is now the cornerstone of verification for advanced chip designs, but how emulation will evolve to meet future demands involving increasingly dense, complex, and heterogeneous architectures isn't entirely clear. EDA companies have been investing heavily in emulation, increasing capacity, boosting performance, and adding new capabilities. Now the big question is how else they can le... » read more

Challenges In RF Design
By Roland Jancke - 14 Oct, 2021 - Comments: 0

Designing highly integrated components for radio frequency applications poses special challenges for system engineers, designers and the commissioning engineers. The boundary between chip, package and board is increasingly vanishing on modern components. It is growing more common for parts of the functionality to be moved to the package or even the board. In some cases, the requirements have be... » read more

Architecting Interposers
By Brian Bailey - 14 Oct, 2021 - Comments: 0

An interposer performs a similar function as a printed circuit board (PCB), but when the interposer is moved inside a package the impact is significant. Neither legacy PCB nor IC design tools can fully perform the necessary design and analysis tasks. But perhaps even more important, adding an interposer to a design may require organizational changes. Today, leading-edge companies have shown ... » read more

Software-Hardware Co-Design Becomes Real
By Brian Bailey - 27 Sep, 2021 - Comments: 1

For the past 20 years, the industry has sought to deploy hardware/software co-design concepts. While it is making progress, software/hardware co-design appears to have a much brighter future. In order to understand the distinction between the two approaches, it is important to define some of the basics. Hardware/software co-design is essentially a bottom-up process, where hardware is deve... » read more

The Importance Of Aging Simulation In IC Design
By Andre Lange - 09 Sep, 2021 - Comments: 0

Electronics reliability has been an important quality criterion in the automotive sector and in industrial automation for years. Electronics in this sector have to achieve product lifetimes of 10+ years under partially harsh environmental conditions. But the reliability of electronics is also becoming more important in other fields. For example, end customers now keep consumer products longer, ... » read more

Wrestling With Analog At 3nm
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Analog engineers are facing big challenges at 3nm, forcing them to come up with creative solutions to a widening set of issues at each new process node. Still, these problems must be addressed, because no digital chip will work without at least some analog circuitry. As fabrication technologies shrink, digital logic improves in some combination of power, performance, and area. The process te... » read more

Tradeoffs Between Edge Vs. Cloud
By Brian Bailey - 09 Sep, 2021 - Comments: 0

Increasing amounts of processing are being done on the edge, but how the balance will change between what's computed in the cloud versus the edge remains unclear. The answer may depend as much on the value of data and other commercial reasons as on technical limitations. The pendulum has been swinging between doing all processing in the cloud to doing increasing amounts of processing at the ... » read more

Will Monolithic 3D DRAM Happen?
By Bryon Moyer - 09 Sep, 2021 - Comments: 1

As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the third dimension to the architecture. There are two ways to accomplish that. One is in a package, which is already happening. The second is to sale the die into the Z axis, which which has been a to... » read more

An 8 Bit To 12 Bit Resolution Programmable 5 MSample/s Current Steering Digital-To-Analog Converter In A 22 nm FD-SOI CMOS Technology
By Fraunhofer IIS/EAS - 08 Sep, 2021 - Comments: 0

Authors: Jeongwook Koh, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Shishira S. Venkatesha, Dresden University of Technology, Dresden, Germany Sunil S. Rao, Division Engineering of Adaptive Systems EAS, Fraunhofer Institute for Integrated Circuits IIS, Dresden, Germany Marcel Jotschke, Division Engineering of Ad... » read more

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