Challenges Mount For EUV Masks


ASML Holding’s first production-worthy scanners for extreme ultraviolet (EUV) lithography are expected to ship this year, but there are still a number of challenges to bring the technology into high-volume manufacturing. As before, the three main challenges for EUV are the power sources, resists and photomasks. To date, the resists are making progress, while the EUV power sources remain a ... » read more

Experts At The Table: Who Takes Responsibility?


Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate marketing at Atrenta; ... » read more

Experts At The Table: Who Takes Responsibility?


By Ed Sperling Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate market... » read more

Time To Think


The semiconductor industry seems to be running place these days—maybe even sprinting in place. At the leading edge of design, companies are still looking at the ramifications of moving to finFETs. The move to a 20nm process with double patterning on 16/14nm finFETs, depending on the foundry, looks like a fairly safe bet for those companies with the volume and the resources to design and de... » read more

The Week In Review: Sept. 23


By Mark LaPedus For some time, Apple’s iPhones have incorporated a separate RF switch and diversity switch from Peregrine Semiconductor (PSMI). The switches are based on a silicon-on-insulator (SOI) variant called silicon-on-sapphire (SOS). Murata takes Peregrine’s RF switches and integrates them into a module. Doug Freedman, an analyst with RBC Capital, said Apple is no longer using PSMI�... » read more

Litho Roadmap Remains Cloudy


By Mark LaPedus For some time, the lithography roadmap has been cloudy. Optical lithography has extended much further than expected. And delays with the various next-generation lithography (NGL) technologies have forced the industry to re-write the roadmap on multiple occasions. Today, there is more uncertainty than ever in lithography. Until recently, for example, leading-edge logic chipma... » read more

MRAM Begins To Attract Attention


By Mark LaPedus In the 1980s, there were two separate innovations that changed the landscape in a pair of related fields—nonvolatile memory and storage. In one effort, Toshiba invented the flash memory, thereby leading to NAND and NOR devices. On another front, physicists discovered the giant magnetoresistance (GMR) effect, a technology that forms the basis of hard disk drives, magnetores... » read more

The Week In Review: Sept. 16


By Mark LaPedus In June, Crucial.com teamed up with Lou Ferrigno to invite all frustrated computer users to submit a short video showing their most fearsome, frustration-filled and computer-induced roar. Each video was evaluated according to a variety of factors, including volume, enthusiasm, perceived distress, frustration, anxiety, irritation and overall hopelessness. The memory module suppl... » read more

Experts At The Table: Process Technology Challenges


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future transistor, process and manufacturing challenges with Subramani Kengeri, vice president of advanced technology architecture at GlobalFoundries; Carlos Mazure, chief technical officer at Soitec; Raj Jammy, senior vice president and general manager of the Semiconductor Group at Intermolecular; and Girish Dixit, v... » read more

Experts At The Table: Who Takes Responsibility?


By Ed Sperling Semiconductor Engineering sat down with John Koeter, vice president of marketing and AEs for IP and systems at Synopsys; Mike Stellfox, technical leader of the verification solutions architecture team at Cadence; Laurent Moll, CTO at Arteris; Gino Skulick, vice president and general manager of the SDMS business unit at eSilicon; Mike Gianfagna, vice president of corporate market... » read more

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