tag: heterogeneous integration

Rethinking Design, Workflow For 3D
By Karen Heyman - 26 Oct, 2023 - Comments: 0

In the 3D world, where NAND has hundreds of layers and packages come in intricate stacks, fresh graduates and veteran engineers alike are being confronted with design challenges that require a rethinking of both classic designs and traditional workflows, but without breaking the laws of physics. “There are pockets of things that have been on 3D for quite some time,” said Kenneth Larson, ... » read more

Making Connections In 3D Heterogeneous Integration
By Ann Mutschler - 26 Oct, 2023 - Comments: 0

Activity around 3D heterogeneous integration (3DHI) is heating up, driven by growing support from governments, the need to add more features and compute elements into systems, and a widespread recognition that there are better paths forward than packing everything into a single SoC at the same process node. The leading edge of chip design has changed dramatically over the last few years. Int... » read more

Heterogeneous Integration Finding Its Footing
By Ed Sperling - 19 Oct, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss heterogeneous integration with Dick Otte, president and CEO of Promex Industries; Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology; Shekhar Kapoor, senior director of product management at Synopsys; John Park, product management group director in Cadence's Custom IC & PCB Group; and Tony Mastroianni, advanced packagin... » read more

How Multi-Die Systems Are Transforming Electronic Design
By Synopsys - 11 Oct, 2023 - Comments: 0

How can the electronics industry continue as Moore’s law slows, system complexity increases, and the number of transistors balloons to trillions? Multi-die systems have emerged as the solution to go beyond Moore’s law and address the challenges of systemic complexity, allowing for accelerated, cost-effective scaling of system functionality, reduced risk and time to market, lower system p... » read more

Issues In Calculating Glitch Power
By Ed Sperling - 11 Oct, 2023 - Comments: 0

The amount of power consumed by redundant non-functional toggles, or glitch power, can be as high as 35% of total power consumption in a design. What can be done about that? Godwin Maben, low-power architect and scientist at Synopsys, takes a deep dive into the causes of glitch, how it is affected by new process nodes and heterogeneous integration, and the impact of different workloads, higher ... » read more

Die-To-Die Security
By Ed Sperling - 02 Oct, 2023 - Comments: 0

Security concerns are growing as more chiplets or die are added into a package. There are more possible attack points, and data is becoming increasingly valuable, which makes a successful attack much more lucrative than in the past. Mike Borza, Synopsys scientist, talks about the impact of heterogeneous integration on security, what the risks are for multi-tenant data centers, and what happens ... » read more

Everyone’s A System Designer With Heterogeneous Integration
By Ann Mutschler - 02 Oct, 2023 - Comments: 0

The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Reliability Performance Of S-Connect Module (Bridge Technology) For Heterogeneous Integration Packaging
By Amkor - 21 Sep, 2023 - Comments: 0

Bridge technology is a promising heterogeneous integration (HI) solution for application-specific integrated circuits (ASICs) and high bandwidth memory (HBM). The bridge dies provide localized communications among the multiple system on chips (SoCs) in a single package. In Amkor's bridge technology, S-Connect provides die-to-die connections with fine pitch [1]. Prototype S-Connect technology wa... » read more

Why Chiplets Don’t Work For All Designs
By Ed Sperling - 20 Sep, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

The Glass Substrate Question: When Will It Replace Copper Clad Laminate?
By Keith Best - 12 Sep, 2023 - Comments: 0

"When will glass replace copper clad laminate on advanced IC substrates?" That’s a question many on the heterogeneous integration (HI) side of the semiconductor industry are asking. Unfortunately, the answer is not straightforward. But before we get to answering that, let’s take an advanced IC substrate (AICS) refresher. In other words, how did we get to the point where glass substrat... » read more

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