Business, Technology Challenges Increase For Photomasks


Experts at the Table: Semiconductor Engineering sat down to discuss optical and EUV photomasks issues, as well as the challenges facing the mask business, with Naoya Hayashi, research fellow at DNP; Peter Buck, director of MPC & mask defect management at Siemens Digital Industries Software; Bryan Kasprowicz, senior director of technical strategy at Hoya; and Aki Fujimura, CEO of D2S. What f... » read more

Curvilinear Design Benefits For Wafers


Throughout this blog series the focus has been on curvilinear photomasks – the benefits, enablers, and challenges. It leads to the obvious question that Aki Fujimura, CEO of D2S, put to the panel of luminaries. If leading-edge mask shops are ready for curvilinear shapes on mask enabled by curvilinear ILT, multi-beam mask writers and the mask design chain, can we have curvilinear target shapes... » read more

Inverse lithography technology: 30 years from concept to practical, full-chip reality


Published in the Journal of Micro/Nanopatterning, Materials, and Metrology, Aug. 31, 2021. Read the full technical paper here (open access). Abstract In lithography, optical proximity and process bias/effects need to be corrected to achieve the best wafer print. Efforts to correct for these effects started with a simple bias, adding a hammer head in line-ends to prevent line-end shortening. T... » read more

Optimizing VSB Shot Count For Curvilinear Masks


The increased photomask write time using a variable-shape e-beam (VSB) writer has been a barrier to the adoption of inverse lithography technology (ILT) beyond the limited usage for hot spots. The second installment of this video blog looked at the challenge in depth. In this five-minute panel video with industry luminaries, Ezequiel Russell describes the collaborative study between his company... » read more

Is The Photomask Ecosystem Ready For Curvilinear ILT?


The time it takes to write a photomask with curvilinear shapes was a major historical barrier to adoption inverse lithography technology (ILT), as discussed in the second installment of our blog series on curvilinear mask shapes. After years of development, multi-beam mask writers came into production and one of their features is the ability to write curvilinear masks without a write time penal... » read more

How Extensively Will Curvilinear ILT Be Used For EUV Photomasks?


Curvilinear shapes on photomasks lead to improved process windows, as the first installment of this blog series discussed. Our blog series continues with a video panel discussion of the benefits that curvilinear shapes have for EUV photomasks (masks) and whether curvilinear shapes will be used beyond today’s usage for hotspots. Our panellists approached the question of curvilinear ILT for ... » read more

Applications, Challenges For Using AI In Fabs


Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

AI And High-NA EUV At 3/2/1nm


Semiconductor Engineering sat down to discuss lithography and photomask issues with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Harry Levinson, principal at HJL Lithography; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. To vie... » read more

Enabling Curvilinear Masks


This talk by Leo Pang, Chief Product Officer of D2S, takes a look at a unique GPU-accelerated approach to curvilinear inverse lithography technology (ILT) and introduces mask-wafer co-optimization (MWCO) that enables writing curvilinear ILT for 193i on VSB or multi-beam machines in 12 hours. » read more

How And Where ML Is Being Used In IC Manufacturing


Semiconductor Engineering sat down to discuss the issues and challenges with machine learning in semiconductor manufacturing with Kurt Ronse, director of the advanced lithography program at Imec; Yudong Hao, senior director of marketing at Onto Innovation; Romain Roux, data scientist at Mycronic; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. Part one ... » read more

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