tag: Intel

More Errors, More Correction in Memories
By Bryon Moyer - 09 Nov, 2021 - Comments: 1

As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to account for and correct bit errors, but as more sophisticated error-correction codes (ECC) are used, it requires more silicon area, which in turn drives up the cost. Given this trend, the looming question is whether the cost of ... » read more

Manufacturing Bits: Nov. 2
By Mark LaPedus - 02 Nov, 2021 - Comments: 0

IRDS lithography roadmap The Journal of Micro/Nanopatterning, Materials, and Metrology (JM3) has published a paper that outlines the lithography roadmap and the various challenges for the next 15 years. The paper, called the "International Roadmap for Devices and Systems lithography roadmap," projects that extreme ultraviolet (EUV) lithography and a next-generation version will remain the m... » read more

Reviving The IPO Route For IP Companies
By Ed Sperling - 01 Nov, 2021 - Comments: 0

K. Charles Janac, chairman and CEO of Arteris IP, sat down with Semiconductor Engineering to talk about the company's recent decision to go public, including the benefits and risks of operating as a public IP company. SE: The rule of thumb used to be $20 million in revenue was needed for an IP company to do an IPO at the turn of the Millennium, and then it increased to $40 million about a de... » read more

Partitioning For Better Performance And Power
By Ann Mutschler - 28 Oct, 2021 - Comments: 0

Partitioning is becoming more critical and much more complex as design teams balance different ways to optimize performance and power, shifting their focus from a single chip to a package or system involving multiple chips with very specific tasks. Approaches to design partitioning have changed over the years, most recently because processor clock speeds have hit a wall while the amount of d... » read more

Manufacturing Bits: Oct. 26
By Mark LaPedus - 26 Oct, 2021 - Comments: 0

GaN finFETs, scaling GaN At the upcoming IEEE International Electron Devices Meeting (IEDM) in San Francisco, a slew of entities will present papers on the latest technologies in R&D. The event, to be held Dec. 11–15, involve papers on advanced packaging, CMOS image sensors, interconnects, transistors, power devices and other technologies. At IEDM, Intel will present a paper on a GaN-... » read more

Scaling Bump Pitches In Advanced Packaging
By Mark LaPedus - 25 Oct, 2021 - Comments: 0

Interconnects for advanced packaging are at a crossroads as an assortment of new package types are pushing further into the mainstream, with some vendors opting to extend the traditional bump approaches while others roll out new ones to replace them. The goal in all cases is to ensure signal integrity between components in IC packages as the volume of data being processed increases. But as d... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 22 Oct, 2021 - Comments: 0

Chipmakers Apple has introduced its latest MacBook Pro notebooks built around the company’s new, in-house designed processors, dubbed the M1 Pro and M1 Max. The chips, to be incorporated in its 14- and 16-inch MacBook Pro systems, are the most powerful devices developed by Apple. The CPUs in the M1 Pro and M1 Max chips deliver up to 70% faster performance than the first M1 device. Based ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Ed Sperling - 22 Oct, 2021 - Comments: 0

An investigation by the Automobile Association of America found that lane-keeping assist and automatic emergency braking, both high-profile ADAS features, are prone to failure in rain. According to the report, 69% of tests conducted with simulated rainfall resulted in test vehicles crossing lane markers, and 33% of simulations resulted in collisions at 35 mph. Surprisingly, risk of accidents di... » read more

Gearing Up For High-NA EUV
By Mark LaPedus - 21 Oct, 2021 - Comments: 2

The semiconductor industry is moving full speed ahead to develop high-NA EUV, but bringing up this next generation lithography system and the associated infrastructure remains a monumental and expensive task. ASML has been developing its high-numerical aperture (high-NA) EUV lithography line for some time. Basically, high-NA EUV scanners are the follow-on to today’s EUV lithography systems... » read more

Progress On General-Purpose Quantum Computers
By Katherine Derbyshire - 21 Oct, 2021 - Comments: 0

The race is on to scale up quantum computing, transforming it from an esoteric research tool into a commercially viable, general-purpose machine. Special-purpose quantum computers have been available for several years now. Systems like D-Wave’s Advantage focus on specific classes of problems that are amenable to modeling as quantum systems. Still, the ultimate goal of having a general purp... » read more

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