Week In Review: Design, Low Power


Wafer company Soitec and European missile manufacturer MBDA joined together to buy the assets of Dolphin Integration. The IP and EDA tool provider, founded in 1985 in Grenoble, France, has been struggling, recently concluding insolvency proceedings and going into receivership. The new joint venture will absorb Dolphin's 155 employees and be owned 60% by Soitec, 40% by MBDA. The two companies co... » read more

Gaps In Verification Metrics


As design complexity has exploded, the verification effort has likewise grown exponentially, with many different types of verification being applied to different classes of design. A recent panel discussion with leading chipmakers examined this topic in an effort to shed light on design health and quality, measuring the success of verification, knowing when verification is complete, being on... » read more

Bugs That Kill


Are simulation-resistant superbugs stifling innovation? That is a question Craig Shirley, president and CEO of Oski Technology, asked a collection of semiconductor executives over dinner. Semiconductor Engineering was invited to hear that discussion and to present the key points of the discussion. To promote free conversation, the participants, who are listed below, asked not to be quoted di... » read more

Blog Review: Aug. 22


Cadence's Paul McLellan considers how much further we need to go to make EUV work for 5nm, the problem of cost, and ASML's EUV roadmap. In a video, Mentor's Colin Walls explains optimizing data in embedded software with a simple example of two ways to put data in memory and how to decide which is best. Synopsys' Fred Bals provides a rundown of the different types of application security t... » read more

3D NAND Flash Wars Begin


3D NAND suppliers are gearing up for a new battle amid a period of price and competitive pressures, racing each other to the next technology generations. Competition is intensifying as a new player enters the 3D NAND market—China’s Yangtze Memory Technologies Co. (YMTC). Backed by billions of dollars in funding from the Chinese government, YMTC recently introduced its first 3D NAND techn... » read more

Week In Review: Design, Low Power


Intel disclosed a speculative execution side-channel attack method called L1 Terminal Fault (L1TF). Leslie Culbertson, Intel's executive vice president and general manager of Product Assurance and Security, writes: "This method affects select microprocessor products supporting Intel Software Guard Extensions (Intel SGX) and was first reported to us by researchers at KU Leuven University, Techni... » read more

Week in Review: IoT, Security, Auto


Cybersecurity Check Point Software Technologies reports that facsimile machines (yes, people still use them!) can be subject to hacking through vulnerabilities in their communication protocols. The HP Officejet Pro All-in-One fax printers and other fax machines can be compromised with a hacker only knowing a fax number, according to the company. Check Point Research says a design flaw in Andro... » read more

Next-Gen Memory Ramping Up


The next-generation memory market is heating up as vendors ramp a number of new technologies, but there are some challenges in bringing these products into the mainstream. For years, the industry has been working on a variety of memory technologies, including carbon nanotube RAM, FRAM, MRAM, phase-change memory and ReRAM. Some are shipping, while others are in R&D. Each memory type is di... » read more

More Performance At The Edge


Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

Blog Review: Aug. 8


Cadence's Meera Collier provides a primer on the basics of quantum computing, including how quantum gates work using superpositions and how it could impact chip design. Mentor's Dennis Brophy shares a list of resources to help you get up to speed on the recently-approved Portable Test and Stimulus standard, which enables test scenarios to be run across different execution platforms. Synop... » read more

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