tag: JEDEC

Chip Industry Week In Review
By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

CXL: The Future Of Memory Interconnect?
By Karen Heyman - 12 Oct, 2023 - Comments: 1

Momentum for sharing memory resources between processor cores is growing inside of data centers, where the explosion in data is driving the need to be able to scale memory up and down in a way that roughly mirrors how processors are used today. A year after the CXL Consortium and JEDEC signed a memorandum of understanding (MOU) to formalize collaboration between the two organizations, suppor... » read more

Using Deep Data Analytics To Enhance Reliability Testing The Fast Roadmap for Zero Defects
By proteanTecs - 10 Oct, 2023 - Comments: 0

proteanTecs and ELES have partnered together to enhance reliability testing with deep data analytics. This collaboration enables SoC manufacturers to improve their qualification envelope to achieve lifetime reliability, shorten their root cause analysis time, and reduce operational costs. This innovative approach adds parametric measurements during the stress test in order to accurately and pre... » read more

Week In Review: Design, Low Power
By Linda Christensen - 25 Aug, 2023 - Comments: 0

Arm filed its registration statement for a highly anticipated IPO. Chip industry heavyweights Apple, Samsung, NVIDIA, and Intel are all expected to invest. Find the SEC filing here. Taiwan’s National Science and Technology Council (NSTC) laid out a 10-year initiative to bolster its IC design market share to 40% worldwide by 2033, with the first year’s budget of US $376 million. The sh... » read more

Power Supply Noise Effects On Jitter In Clock Synchronous Systems With Emphasis On Memory Interfaces
By Synopsys - 09 Aug, 2023 - Comments: 0

Power Supply Noise Effects on Jitter in Clock Synchronous Systems with Emphasis on LPDDR5X, DDR5 and HBM3 In today's fast-paced digital world, the performance and capacity of high-speed memory has become crucial for a wide range of applications, from personal computing devices to data centers and high-performance computing systems. Designers face challenges in optimizing their designs ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Aug, 2023 - Comments: 0

Qualcomm, NXP, Infineon, Nordic, and Bosch are jointly investing in a new RISC-V company, to be formed in Germany, that will speed up RISC-V’s adoption in commercial products. The company will be “a single source to enable compatible RISC-V based products, provide reference architectures, and help establish solutions widely used in the industry,” according to a press release. The co... » read more

Week In Review: Design, Low Power
By Jesse Allen - 14 Apr, 2023 - Comments: 0

Arm and Intel Foundry Services inked a multi-generation agreement to enable chip designers to build Arm-based SoCs on the Intel 18A process. The initial focus is mobile SoC designs, but the deal allows for potential expansion into automotive, IoT, data center, aerospace, and government applications. IFS and Arm will undertake design technology co-optimization (DTCO) to optimize chip design and ... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 03 Mar, 2023 - Comments: 0

Security The Biden administration released a National Cybersecurity Strategy report this week, calling on the tech community to shoulder much more responsibility, placing "responsibility on those within our digital ecosystem that are best positioned to reduce risk and shift the consequences of poor cybersecurity away from the most vulnerable in order to make our digital ecosystem more trustwor... » read more

Week In Review: Design, Low Power
By Jesse Allen - 03 Mar, 2023 - Comments: 0

Apple plans to spend an additional €1 billion (~$1.1B) over the next six years to expand its Munich, Germany-based Silicon Design Centre, including the construction of a new research facility. "The expansion of our European Silicon Design Centre will enable an even closer collaboration between our more than 2,000 engineers in Bavaria working on breakthrough innovations, including custom sil... » read more

Week in Review: Design, Low Power
By Jesse Allen - 03 Feb, 2023 - Comments: 0

Intel discontinued its Pathfinder for RISC-V program, according to numerous reports. The program provided a pre-silicon development environment to support IP selection and early-stage software development using Intel FPGA and simulator platforms. "Since Intel will not be providing any additional releases or bug fixes, we encourage you to promptly transition to third-party RISC-V software tools ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy