Chip Industry Technical Paper Roundup: July 16


New technical papers recently added to Semiconductor Engineering’s library. [table id=244 /] More ReadingTechnical Paper Library home   » read more

Monolithic 3D TFT Integration at Room Temperature, Used to Stack 10 Vertical Layers


A new technical paper titled "Three-dimensional integrated metal-oxide transistors" was published by researchers at KAUST (King Abdullah University of Science and Technology). Abstract "The monolithic three-dimensional vertical integration of thin-film transistor (TFT) technologies could be used to create high-density, energy-efficient and low-cost integrated circuits. However, the develo... » read more

Resilient And Secure Programmable SoC Accelerator Offload (KAUST)


A technical paper titled “Resilient and Secure Programmable System-on-Chip Accelerator Offload” was published by researchers at King Abdullah University of Science and Technology (KAUST). Abstract: "Computational offload to hardware accelerators is gaining traction due to increasing computational demands and efficiency challenges. Programmable hardware, like FPGAs, offers a promising plat... » read more

Chip Industry Technical Paper Roundup: June 10


New technical papers added to Semiconductor Engineering’s library this week. [table id=232 /] More ReadingTechnical Paper Library home » read more

Properties of Commercially Available Hexagonal Boron Nitride Grown By The CVD Method


A new technical paper titled "On the quality of commercial chemical vapour deposited hexagonal boron nitride" was published by researchers at KAUST and the National Institute for Materials Science in Japan. Abstract "The semiconductors industry has put its eyes on two-dimensional (2D) materials produced by chemical vapour deposition (CVD) because they can be grown at the wafer level with sm... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan. The Japanese government approved $3.9 billion in funding for chipmaker Rapidus to expand its foundry business, of which 10% will be invested in advanced packaging. This is in addition to the previously announced $2.18 billion in funding. In a meeting next week, the U.S. and Japan are expected to cooperate on increasing semiconductor development a... » read more

Chip Industry Technical Paper Roundup: April 2


New technical papers recently added to Semiconductor Engineering’s library. [table id=211 /] Find last week’s technical paper additions here. » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan.  China introduced strict procurement guidelines aimed at blocking the use of AMD and Intel processors in government computers. Meanwhile, China urged the Netherlands to ease restrictions on deep ultraviolet (DUV) litho equipment, according to Nikkei Asia. DUV is an older technology, based on 193nm ArF lasers, but in conjunction with multi-p... » read more

HW Implementation of Memristive ANNs


A new technical paper titled "Hardware implementation of memristor-based artificial neural networks" was published by KAUST, Universitat Autònoma de Barcelona, IBM Research, USC, University of Michigan and others. Abstract: "Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units oper... » read more

Chip Industry Technical Paper Roundup: Mar. 19


New technical papers recently added to Semiconductor Engineering’s library. [table id=206 /] More ReadingTechnical Paper Library home » read more

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