3DIC partitioning; graphene FETs; analog in-memory DNN training; leakage contracts for processors; electromechanical resonators; quantum error correction; AFM; DSA sub-10nm.
New technical papers recently added to Semiconductor Engineering’s library:
| Technical Paper | Research Organizations |
|---|---|
| Fast and robust analog in-memory deep neural network training | IBM Research |
| TA3D: Timing-Aware 3D IC Partitioning and Placement by Optimizing the Critical Path | POSTECH and Baum Design Systems |
| Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches | Graz University of Technology |
| Fabrication of graphene field effect transistors on complex non-planar surfaces | Imperial College London |
| Noncontact excitation of multi-GHz lithium niobate electromechanical resonators | Yale University |
| Suspended tip overhanging from chip edge for atomic force microscopy with an optomechanical resonator | CNRS and CEA-LETI |
| Quantum error correction below the surface code threshold | Google et al. |
| Chemically tailored block copolymers for highly reliable sub-10-nm patterns by directed self-assembly | Tokyo Institute of Technology and Tokyo Ohka Kogyo Co. |
| The Effect of Relative Humidity in Conductive Atomic Force Microscopy | KAUST |
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