tag: Lam Research

China Unveils Memory Plans
By Mark LaPedus - 19 Jan, 2017 - Comments: 2

Backed by billions of dollars in government funding, China in 2014 launched a major initiative to advance its domestic semiconductor, IC-packaging and other electronic sectors. So far, though, the results are mixed. China is making progress in IC-packaging, but the nation’s efforts to advance its domestic logic and memory sectors are still a work in progress. In fact, China has yet to achi... » read more

Blog Review: Jan. 18
By Jesse Allen - 18 Jan, 2017 - Comments: 0

Mentor's Michael White warns that while skipping a node can be appealing, be prepared for the increase in computation requirements. Synopsys' Hezi Saar checks out the benefits of moving to the MIPI I3C standardized sensor interface. Cadence's Paul McLellan highlights a talk by Eric Grosse on approaches to security and the RISC-V architecture. Applied's Mike Chudzik explains the problem... » read more

Blog Review: Jan. 11
By Jesse Allen - 11 Jan, 2017 - Comments: 0

Mentor's Ron Press examines why test hasn't become a bottleneck in creating ever more advanced semiconductors. Synopsys' Graham Etchells warns that while finFET technologies have been successful, challenges persist. Cadence's Paul McLellan shares a behind-the-scenes look at developing the Palladium Z1 emulator. The White House's Craig Mundie and Paul Otellini highlight a PCAST report o... » read more

Smart Manufacturing Gains Momentum
By Ed Sperling - 05 Jan, 2017 - Comments: 0

Smart manufacturing is gaining traction as a way of addressing increased market fragmentation while still leveraging economies of scale. The goal is to add a level of flexibility into manufacturing processes that until recently was considered impossible. Although the approach makes sense in theory, real-world implementation is proving far from consistent. Sometimes referred to as Industr... » read more

BEOL Issues At 10nm And 7nm (part 2)
By Ed Sperling - 04 Jan, 2017 - Comments: 3

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Foundries See Mixed Future
By Mark LaPedus - 21 Dec, 2016 - Comments: 1

Amid a tumultuous business environment, the silicon foundry industry is projected to see steady growth in a number of process segments in 2017. As in past years, the foundry market is expected to grow faster than the overall IC industry in 2017. But at the same time, the IC industry—the foundry customer base—continues to witness a frenetic wave of merger and acquisition activity. Basical... » read more

Uncertainty Grows For 5nm, 3nm
By Mark LaPedus - 19 Dec, 2016 - Comments: 4

As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

Etching Technology Advances
By Jeff Dorsch - 15 Dec, 2016 - Comments: 0

Let’s get really, really small. That directive from leading semiconductor companies and their customers is forcing the whole semiconductor supply chain to come up with new ways to design and manufacture ever-shrinking dimensions for chips. The current push is to 10nm and 7nm, but R&D into 5nm and 3nm is already underway. To put this in perspective, there are roughly two silicon atom... » read more

BEOL Issues At 10nm And 7nm (Part 1)
By Ed Sperling - 15 Dec, 2016 - Comments: 5

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

BEOL Barricades Ahead
By David Fried - 15 Dec, 2016 - Comments: 0

Coventor recently assembled an expert panel at IEDM 2016, to discuss changes to BEOL process technology that would be needed to continue dimensional scaling to 7 nm and lower. Among the questions posed to panelists: What is BEOL? Where does it begin and end? Are there fundamental limits to interconnect processes? How much longer can we continue to use current interconnect processes and ... » read more

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