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Cloud Drives Changes In Network Chip Architectures


Cloud data centers have changed the networking topology and how data moves throughout a large data center, prompting significant changes in the architecture of the chips used to route that data and raising a whole new set of design challenges. Cloud computing has emerged as the fast growing segment of the data center market. In fact, it is expected to grow three-fold in the next few years, a... » read more

What’s In The Package?


Putting a variety of chips or hardened IP blocks into a package rather than trying to cram them into a single chip continues to gain ground. But it's also creating its own set of issues around verifying and testing these devices. This problem is well understood inside of SoCs, where everything is integrated into a single die. And looked at from a 30,000-foot perspective, packaging is someth... » read more

Cheaper Packaging Options Ahead


Lower-cost packaging options and interconnects are either under development or just being commercialized, all of which could have a significant impact on the economics of advanced packaging. By far, the most cited reason why companies don't adopt advanced [getkc id="27" kc_name="packaging"] is cost. Currently, silicon [getkc id="204" kc_name="interposers"] add about $30 to the price of a med... » read more

Advanced Packaging Goes Mainstream


The roadmap for shrinking digital logic will continue for at least the next 10 years. For others devices, particularly analog, it will slow down or end. And therein lies one of the most fundamental changes in semiconductor design and manufacturing in the past half century. This is no longer just talk. Apple is using a fan-out architecture in its iPhone 7. Memory makers are stacking NAND and ... » read more

2.5D Creeps Into SoC Designs


A decade ago top chipmakers predicted that the next frontier for SoC architectures would be the z axis, adding a third dimension to improve throughput and performance, reduce congestion around memories, and reduce the amount of energy needed to drive signals. The obvious market for this was applications processors for mobile devices, and the first companies to jump on the stacked die bandwag... » read more

EDA Sales Strong Again


EDA and IP sales were robust again in Q1, up 7.5% to $1.877 billion compared with $1.746 billion in the same period in 2014, according to the EDA Consortium. On the upside, IP revenue rose 19.3% to $618.1 million; services revenue increased 6.8% to $104.4 million; and PCB and multi-chip module revenue increased 1.1% to $161.5 million. On the downside, CAE—the largest single category—... » read more

Pushing The Limits


Ever since the turn of the millennium, researchers have been warning that wires and interconnects will have issues. Electron crashes were reported as early as 2001, and electromigration is rising to the forefront of problems at advanced nodes. The result? Chipmakers are looking at thicker wires for the first time as a way of dealing with resistance and capacitance issues. While this makes se... » read more

Welcome To The ‘Probably Good Die’ Era


By Mark LaPedus In today’s systems, consumers want more performance and bandwidth with a longer battery life. Some chip segments are keeping up with the demands. Still other areas are falling way behind the curve. Battery life is an obvious problem, but memory bandwidth is under the radar. “Initially, memory bandwidth nearly doubled every two years, but this trend has slowed over the pa... » read more

The Turning Point


By Javier DeLaCruz In the epic battle of cost and performance, MCMs (multi-chip modules) had generally lost to SoCs (systems on chip) due to higher package-assembly costs and lower performance. The tides are turning. Four factors have been in play in recently: Package assembly costs of MCMs have been dropping in recent years. MCM package technologies are becoming commonplace instead... » read more