tag: Mentor

Complex Chips Make Security More Difficult
By John Koon - 04 Nov, 2021 - Comments: 0

Semiconductor supply chain management is becoming more complex with many more moving parts as chips become increasingly disaggregated, making it difficult to ensure where parts originated and whether they have been compromised before they are added into advanced chips or packages. In the past, supply chain concerns largely focused primarily on counterfeit parts or gray-market substitutions u... » read more

Optimizing System-Level Connectivity In Heterogenous Automotive Packages
By Keith Felton - 04 Nov, 2021 - Comments: 0

By Keith Felton and Cristina Somma With the massive growth of electronics in the automotive sector (such as autonomous driving, electric vehicles, and safety systems), the complexity, capabilities, and volume of semiconductors is rapidly increasing the demand for greater package connectivity density. This has led to high-end IC-package solutions, such as copper pillar bumping with very fi... » read more

How To Reduce The Impact Of The Global Microcontroller Shortage On ECU Software Development
By Siemens EDA - 03 Nov, 2021 - Comments: 0

The COVID-19 pandemic had a massive impact on all facets of business and commerce, as widespread supply chain disruptions rippled through every industry. Multiple factors collided to create a global microcontroller shortage that is now impacting the automotive industry, and is forcing developers to redesign Electronic Control Units (ECUs) using alternative Microcontrollers (MCUs) and to otherwi... » read more

Blog Review: Nov. 3
By Jesse Allen - 03 Nov, 2021 - Comments: 0

In a blog for Arm, Matthew Griffin of the 311 Institute warns that cybersecurity is an increasingly pressing problem, with large criminal organizations raking in large sums of money and attacks able to impact a wide range of physical systems. Cadence's Paul McLellan checks out Google's video encoder chip and how it helps lower the CPU recycles required by the vast number of videos uploaded t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Oct, 2021 - Comments: 0

Arteris IP uncorked its initial public offering this week, a rare occurrence for a semiconductor IP vendor over the past couple decades. The stock began trading on the Nasdaq Global Market on Wednesday under the ticker symbol AIP, gaining more than 40% on its first day. Tools Codasip updated its Studio processor design toolset. Version 9.1 includes an expanded bus support with full AXI for ... » read more

What’s Next For Emulation
By Brian Bailey - 28 Oct, 2021 - Comments: 1

Emulation is now the cornerstone of verification for advanced chip designs, but how emulation will evolve to meet future demands involving increasingly dense, complex, and heterogeneous architectures isn't entirely clear. EDA companies have been investing heavily in emulation, increasing capacity, boosting performance, and adding new capabilities. Now the big question is how else they can le... » read more

Partitioning For Better Performance And Power
By Ann Mutschler - 28 Oct, 2021 - Comments: 0

Partitioning is becoming more critical and much more complex as design teams balance different ways to optimize performance and power, shifting their focus from a single chip to a package or system involving multiple chips with very specific tasks. Approaches to design partitioning have changed over the years, most recently because processor clock speeds have hit a wall while the amount of d... » read more

High-Level Synthesis For RISC-V
By Brian Bailey - 28 Oct, 2021 - Comments: 2

High-quality RISC-V implementations are becoming more numerous, but it is the extensibility of the architecture that is driving a lot of design activity. The challenge is designing and implementing custom processors without having to re-implement them every time at the register transfer level (RTL). There are two types of high-level synthesis (HLS) that need to be considered. The first is ge... » read more

Debug Solutions For Designers Accelerate Time To Verification
By Neil Hand - 28 Oct, 2021 - Comments: 0

Complexity continues to explode as designs become larger and more complicated with more functionality and more aggressive expectations. The cost of doing business as usual, for the entire design and verification team, in turn, grows exponentially, in terms of time, effort, and dollars. Fig. 1: Discovering issues later than possible requires more effort to find and fix. (Source: Wilson Rese... » read more

Microchip Sees Significant Productivity Gains In Mature-Node Custom IC Design With In-Design Signoff DRC
By Siemens EDA - 27 Oct, 2021 - Comments: 0

Microsemi pioneered the design of innovative chips that are used for multiple purposes across a variety of industries, using both mature and advanced process nodes. In mature node custom design implementation, layout designers still spend a significant amount of their valuable time fixing DRC errors—time that could be more beneficially spent ensuring their designs meet their PPA goals. By rep... » read more

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