Week In Review: Design, Low Power


RISC-V RISC-V International announced four new specification and extension approvals. Efficient Trace for RISC-V defines an approach to processor tracing that uses a branch trace. RISC-V Supervisor Binary Interface architects a firmware layer between the hardware platform and the operating system kernel using an application binary interface in supervisor mode to enable common platform services... » read more

IC Reliability Burden Shifts Left


Chip reliability is coming under much tighter scrutiny as IC-driven systems take on increasingly critical and complex roles. So whether it's a stray alpha particle that flips a memory bit, or some long-dormant software bugs or latent hardware defects that suddenly cause problems, it's now up to the chip industry to prevent these problems in the first place, and solve them when they do arise. ... » read more

Why Hardware-Dependent Software Is So Critical


Hardware and software are two sides of the same coin, but they often live in different worlds. In the past, hardware and software rarely were designed together, and many companies and products failed because the total solution was unable to deliver. The big question is whether the industry has learned anything since then. At the very least, there is widespread recognition that hardware-depen... » read more

EDA Embraces Big Data Amid Talent Crunch


The semiconductor industry’s labor crunch finally has convinced chip designers to bet big money on big data. As recently as 2016, executives weren’t sure there was a market for big data approaches to electronic design automation. The following year, utilization of big data remained stuck in its infancy. And in 2018, Semiconductor Engineering questioned why the EDA sector wasn’t investi... » read more

High-Performance 5G IC Designs Need High-Performance Parasitic Extraction


By Karen Chow and Salma Ahmed Elhenedy We are rapidly approaching a future where 5G telecommunications will be the norm. With its increased data speeds and bandwidth, 5G has the potential to change the way we live our lives. But what does that mean for the average person? Think about cellphones, for one. You don't just use your phone for calling or texting anymore—you surf the web, chec... » read more

Enhance IC Reliability Design Verification With Coordinate-Based P2P And CD Checking


Coordinate-based P2P and CD checks with the Calibre PERC reliability platform enable quick early-stage design verification of ESD protection and other IC reliability issues. Using coordinate-based checking minimizes the amount of rule deck coding required, enabling design teams to start Calibre PERC P2P/CD verification very quickly, and understand and debug the results easily. Because P2P/CD ch... » read more

Understanding Automotive Reliability And ISO 26262 for Safety-Critical Systems


Automotive electronics are playing a rapidly expanding role in automotive platforms tied to safety systems. Not content with the more traditional electronic systems such as airbag controllers, anti-lock braking systems, engine control units, and the like, integrated circuit (IC) manufacturers have been expanding into advanced driver assistance systems (ADAS) and other automotive electroni... » read more

Blog Review: June 22


Arm's Andrew Pickard checks out a project at Sorbonne Université in Paris that is using the Cortex-M3 processor source code to model what is happening in the hardware at the microarchitectural level and find ways to prevent side-channel leakage of sensitive cryptographic information. Cadence's Paul McLellan digs into the development of high-NA EUV lithography and some of the challenges ahea... » read more

Power Domain Implementation Challenges Escalate


The number power domains is rising as chip architects build finer-grained control into chips and systems, adding significantly to the complexity of the overall design effort. Different power domains are an essential ingredient in partitioning of different functions. This approach allows different chips in a package, and different blocks in an SoC, to continue running with just enough power t... » read more

Week In Review: Manufacturing, Test


Node scaling wars are revving up, although much of the action is happening where most people can't see it — inside of research labs. This is difficult stuff, which makes delivery dates difficult to pinpoint, and no one wants to give away their competitive position or commit to a timeline they can't keep. Billions of dollars of leading-edge research — funded by pure-play foundry TSMC, IDM... » read more

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