New Metrology and Inspection Technologies Needed for More-Than-Moore Markets

By Applied Materials - 14 Nov, 2018 - Comments: 0

The escalating costs of following Moore’s Law have shifted the semiconductor industry’s focus to More-than-Moore (MtM) technologies, where analog/mixed-signal, RF, MEMS, image sensing, power or other technologies may be integrated with CMOS in a variety of planar, 2.5D and 3D architectures. The integration of these and other key technologies is enabling a host of fast-growing application... » read more

In-Cell Overlay Metrology By Using Optical Metrology Tool

By KLA - 26 Oct, 2018 - Comments: 0

By Honggoo Lee, Sangjun Han, Minhyung Hong, Seungyong Kima, Jieun Lee, DongYoung Leea, Eungryong Oh, and Ahlin Choi of SK Hynix, and Hyowon Park, Waley Liang, DongSub Choi, Nakyoon Kim, Jeongpyo Lee, Stilian Pandev, Sanghuck Jeon, John C. Robinson of KLA-Tencor Abstract Overlay is one of the most critical process control steps of semiconductor manufacturing technology. A typical advanced s... » read more

Digging Deep Into High Aspect Ratio Process Control For Memory Technology

By Mark Shirey - 18 Oct, 2018 - Comments: 0

By Mark Shirey and Janay Camp Data is an integral part of our lives. Contrary to the past, where files had to be removed periodically to free up storage space, we now assume that our data will never be deleted. Why risk deleting the wrong file? Just keep them! This new approach consumes a lot of memory, and intensifies the demand for storage. Two of the main workhorses of the memory segment ... » read more

Spectral Tunability For Accuracy, Robustness And Resilience

By KLA - 16 Aug, 2018 - Comments: 0

In overlay (OVL) metrology the quality of measurements and the resulting reported values depend heavily on the measurement setup used. For example, in scatterometry OVL (SCOL) metrology a specific target may be measured with multiple illumination setups, including several apodization options, two possible laser polarizations, and multiple possible laser wavelengths. Not all possible setups a... » read more

Blog Review: July 4

By Jesse Allen - 04 Jul, 2018 - Comments: 0

Applied Materials' Sundeep Bajikar argues that to get the full benefits of AI, new computing architectures are needed – and that will require new breakthroughs in materials engineering to get beyond classic 2D scaling. Cadence's Tom Wong considers to what extent chip dis-integration is happening and how the industry can cope with the escalating costs of new process nodes and higher-speed i... » read more

Big Trouble At 3nm

By Mark LaPedus - 21 Jun, 2018 - Comments: 0

As chipmakers begin to ramp up 10nm/7nm technologies in the market, vendors are also gearing up for the development of a next-generation transistor type at 3nm. Some have announced specific plans at 3nm, but the transition to this node is expected to be a long and bumpy one, filled with a slew of technical and cost challenges. For example, the design cost for a 3nm chip could exceed an eye-p... » read more

Blog Review: June 20

By Jesse Allen - 20 Jun, 2018 - Comments: 0

Mentor's Randy Allen digs into OpenACC, a collection of directives and routines to help a compiler uncover and schedule parallelism, plus an examination of the GCC implementation's performance. Cadence's Paul McLellan takes a look at the shifting opinions on FD-SOI vs. finFET as Dan Hutcheson of VLSI Research finds most see the two as complementary technologies in his latest survey. Synop... » read more

FinFET Metrology Challenges Grow

By Mark LaPedus - 17 May, 2018 - Comments: 1

Chipmakers face a multitude of challenges in the fab at 10nm/7nm and beyond, but one technology that is typically under the radar is becoming especially difficult—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems in devices and processes. It helps to ensure yields in both the lab and fab. At 28nm and above, metrology is a straightforward... » read more

The Challenges Of Process Control On FinFETs And FD-SOI

By Jeff Barnum - 17 May, 2018 - Comments: 0

Across the semiconductor industry, both FD-SOI and finFET transistor technologies are in high volume production, with IC manufacturers looking to extend both technologies to gain additional performance improvements and meet the variety of customer specific technical and economic requirements. In developing the processes needed for the next-generation FD-SOI and finFET technologies, both transis... » read more

Innovative Scalable Design-Based Care Area Methodology For Defect Monitoring In Production

By KLA - 17 May, 2018 - Comments: 0

By Ian Tolle, GlobalFoundries, and Ankit Jain, KLA-Tencor Abstract The use of design-based care areas on inspection tools [1, 2] to characterize defects has been well established in recent years. However, the implementation has generally been limited to specific engineering use cases, due to the complexity involved with care area creation and inspection recipe setup. Furthermore, creating, ... » read more

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tag: metrology