tag: NBTI

Problems And Solutions In Analog Design
By Ann Mutschler - 05 Aug, 2020 - Comments: 1

Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

Aging Problems At 5nm And Below
By Brian Bailey - 11 Jun, 2020 - Comments: 3

The mechanisms that cause aging in semiconductors have been known for a long time, but the concept did not concern most people because the expected lifetime of parts was far longer than their intended deployment in the field. In a short period of time, all of that has changed. As device geometries have become smaller, the issue has become more significant. At 5nm, it becomes an essential par... » read more

Addressing IC Reliability Issues Using Eldo
By Mentor, a Siemens Business - 01 May, 2019 - Comments: 0

Advanced, short-geometry CMOS processes are subject to aging that causes major reliability issues that degrade the performance of integrated circuits (ICs) over time. Degradation effects causing aging are hot carrier injection (HCI) and negative bias temperature instability (NBTI), in addition to positive bias temperature instability (PBTI) and time-dependent dielectric breakdown (TDDB). Below ... » read more

The Time Is Now For A Common Model Interface
By Ahmed Ramadan - 28 Feb, 2019 - Comments: 0

By Ahmed Ramadan and Greg Curtis Driven by consumer demand for “cheaper, faster, and better,” the semiconductor industry is continually pushing the migration to smaller process geometries. This continued scaling of complex designs into advanced process nodes is critical for applications ranging from high-performance computing to low-power mobile devices. In the past, products like sma... » read more

Process Variation And Aging
By Ann Mutschler - 17 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; and Naseer Khan, vice president of sales at M... » read more

FD-SOI At The Edge
By Ed Sperling - 03 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss changes in the FD-SOI world and what's behind them, with James Lamb, deputy CTO for advanced semiconductor manufacturing and corporate technical fellow at Brewer Science; Giorgio Cesana, director of technical marketing at STMicroelectronics; Olivier Vatel, senior vice president and CTO at Screen Semiconductor Solutions; and Carlos Mazure, CTO at Soi... » read more

Why Chips Die
By Brian Bailey - 12 Nov, 2018 - Comments: 4

Semiconductor devices contain hundreds of millions of transistors operating at extreme temperatures and in hostile environments, so it should come as no surprise that many of these devices fail to operate as expected or have a finite lifetime. Some devices never make it out of the lab and many others die in the fab. It is hoped that most devices released into products will survive until they be... » read more

Taming NBTI To Improve Device Reliability
By Ann Mutschler - 08 Nov, 2018 - Comments: 2

Negative-bias temperature instability is a growing issue at the most advanced process nodes, but it also has proven extremely difficult to tame using conventional approaches. That finally may be starting to change. NBTI is an aging mechanism in field-effect transistors that leads to a change of the characteristic curves of a transistor during operation. The result can be a drift toward unint... » read more

Minimizing Chip Aging Effects
By Brian Bailey - 13 Sep, 2018 - Comments: 2

Aging kills semiconductors, and it is a growing problem for an increasing number of semiconductor applications—especially as they migrate to more advanced nodes. Additional analysis and prevention methods are becoming necessary for safety critical applications. While some aspects of aging can be mitigated up front, others are tied to the operation of the device. What can an engineering tea... » read more

Chip Aging Becomes Design Problem
By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

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