tag: NoC

An Analysis Of Blocking Vs. Non-Blocking Flow Control In On-Chip Networks
By Various Writers - 29 Dec, 2012 - Comments: 0

High end System-on-Chip (SoC) architectures consist of tens of processing engines. These processing engines have varied traffic profiles consisting of priority traffic that require that the latency of the traffic is minimized, controlled bandwidth traffic that require low service jitter on the throughput, and best effort traffic that can tolerate highly variable service. In this paper, we inves... » read more

On-Chip Communications Survey Results
By Various Writers - 19 Dec, 2012 - Comments: 0

This comprehensive report takes a closer look at general technology trends and factors associated with OCCNs, such as core target speeds. It investigates the most popular OCCN topologies being considered for implementation in multi-core SoCs, including networks-on-chip (NoCs), crossbars, peripheral interconnect, and multi-layer bus matrices. It then dives deeper into NoCs, including analyzing a... » read more

IP That Makes IP Work
By Frank Ferro - 28 Jun, 2012 - Comments: 0

By Frank Ferro Just how important are IP subsystems to complex SoC designs? It appears much more than you may have thought just a few months ago. With the emergence of SoCs that now support the cloud computing revolution and every major cloud-connected device, SoC complexity is increasing at a dizzying pace. We commonly now see increasing number of IP cores, cores from multiple sources, di... » read more

The High-Speed Virtual Highway
By Frank Ferro - 22 Sep, 2011 - Comments: 0

By Frank Ferro By now it’s safe to say that complex, high-speed design is no longer a riddle….at least in theory. We all know the end game. In its most fundamental form, isn’t it really a designer’s negotiation and compromise with the end user that comes down to action and reaction? We know users demand more and more applications to run simultaneously on their smart devices. We know... » read more

Executive Briefing: 3D IC Stacking Challenges
By Ed Sperling - 21 Sep, 2011 - Comments: 0

Sonics CEO Grant Pierce sounds off on the challenges of stacking die, what has to change and why. [youtube vid=wCseVs738LQ] » read more

Phased Loops
By Ed Sperling - 17 Jun, 2011 - Comments: 0

One thing that became clear at DAC this year is that the next big collision won’t be the technology itself. It will be the business infrastructure that supports the technology. The integration of IP, software, subsystems, and ultimately entire die and packages will have a major impact on the chip industry on all levels. For some companies it will be good. For others it will be bad. But for... » read more

NoC Is Not A Noun
By Kurt Shuler - 23 Sep, 2010 - Comments: 0

By Kurt Shuler Today in the IP and EDA business, I hear “knock” all the time, except people mean “NoC.” It seems everybody wants a NoC, or wants to offer you a NoC. I’m here to tell you that NoC is not a noun. A network-on-chip is a technology approach that can be used to transfer data and commands in many domains. When people in the IP and EDA businesses say NoC, they are usually... » read more

To Bus Or Not To Bus, That Is The Question
By Ann Mutschler - 31 Jul, 2009 - Comments: 0

By Ann Steffora Mutschler When you hear the words, “block interface,” your ears may not perk up, but as system architects well understand, making the right choice between a bus or non-bus interface on an SoC is absolutely critical to design’s success in terms of power efficiency, reusability and performance. How many of the problems in new chip designs have to do with the interconne... » read more

NoC Your SoCs Off
By Ed Sperling - 19 Feb, 2009 - Comments: 0

By Ed Sperling The network on a chip (NoC) approach is gaining ground as an essential part of a system on a chip (SoC), providing the same kind of time-to-market advantage that well-tested intellectual property blocks provide. This follows almost eight years of hype about NoCs potential with little to show for it. Times have changed and there appear to be two main drivers, one technological a... » read more

The Quest For Faster Data Throughput On A Chip
By Ed Sperling - 19 Feb, 2009 - Comments: 0

By Ed Sperling As with all network topologies, the general rule is the faster the better. Jack Browne, VP of sales and marketing at Sonics, said his customers are asking for higher-speed interconnects. “Right now we’re at 300MHz,” he said. “They want to more than double that in the very near future and eventually get to 1GHz.” Getting to that speed is no simple ... » read more

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