ARMing Intel


For some time, the industry has kept a close eye on Intel’s fledging foundry business. The question is whether Intel will merely dabble in the foundry business or become a major player. The answer? It’s still too early to tell. Not long ago, Intel entered the foundry business and announced a smattering of small and niche-oriented customers, such as Achronix, Netronome and Tabula.  Micro... » read more

Blog Review: Nov. 13


Synopsys’ Brent Gregory digs into optimal paths—in this case between the bakery, the library and another store. This is the classic traveling salesman equation, but with a large sales staff and lots of stops. Mentor’s Michael Ford points to the gap between supply-chain and shop-floor management solutions. This is yet another example of thinking outside the package—and maybe the enti... » read more

ARM Cortex-A53, UPF & FD-SOI


The IEEE Standards Association Symposium on Electronic Design Automation (EDA) Interoperability was held on Oct. 24. I found the first session, Interoperability Challenges: Power Management in Silicon, with presentations by Erich Marschner of Mentor Graphics and Stuart Riches and Adnan Khan (both from ARM) to be particularly interesting. Earlier this year, the IEEE announced a new version of UP... » read more

Verification 2.0: From Tool To Flow


Recently, Cadence held a System-to-Silicon Verification Summit at which companies like Broadcom, Zenverge, NVIDIA, and Ambarella shared their experiences and visions for verification. In one of the keynotes, Brian Bailey shared his vision of how verification would transition from tools to flows. Brian’s presentation was quite insightful. He started with a brief status of where we are curre... » read more

Blog Review: Oct. 16


Cadence’s Richard Goering follows Si2’s move into SPICE modeling following the acquisition of the Compact Model Council. Combining standards groups is a growing trend these days. Mentor’s Colin Walls points to the demise of reset buttons. You can always trip a circuit breaker, and usually turn off a device by pulling out the battery, but a reset button is simpler. Where did they go? ... » read more

On-Chip MCUs Excel At Power Management


By Ann Steffora Mutschler When it comes to supplying power to an SoC, there is an increasing trend to make it more intelligent—how to control it more accurately, how it is monitored and how it communicates with different aspects of the chip. Traditional power supply models with analog supplies have less of this control, so a number of engineering teams are considering the use of on-chip m... » read more

Blog Review: Sept. 18


By Ed Sperling It’s amazing how irresistible an engineer suddenly becomes when he has an FPGA prototyping board in his hands. Check out the photo of Synopsys’ Mick Posner in Taiwan. Cadence’s Brian Fuller digs into semiconductor startups, why there’s been such a lull, and how new startups are changing. Mentor’s John Day picks out a new product category from TI—inductance to... » read more

HotChips: Power8


It’s another year, another HotChips Conference and another update on IBM’s POWER processor. IBM continues to impress with its big iron processor, and this year it’s the new POWER8. IBM announced more details of its new POWER8 processor at HotChips and IBM now joins Intel at 22nm, but with the twist that IBM’s process is based on SOI technology. The POWER8 quadruples the thread count ... » read more

Power Shifts In Digital Chip Space


By Bhanu Kapoor The power issue has been quite disrupting in the digital semiconductor space. The processor architecture shifted to parallel processing with the “power wall” stopping the frequency scaling that the industry had conveniently used in the last few decades. The power issue also is causing semiconductor process technology to change in ways other than simply scaling from one ... » read more

Material Impact


Ed Sperling’s June article New Approaches to Better Performance and Lower Power took a look at the new materials that researchers are examining for future technology nodes. Figure 1. Basic Planar CMOS FET Figure 1 shows a basic diagram of a planar CMOS FET (diagrams for other FETs can be found here). The drive strength of a FET is proportional to , where μ is the surface mobility for... » read more

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