Chip Design Shifts As Fundamental Laws Run Out Of Steam

By Ann Mutschler - 31 Oct, 2022 - Comments: 12

Dennard scaling is gone, Amdahl's Law is reaching its limit, and Moore's Law is becoming difficult and expensive to follow, particularly as power and performance benefits diminish. And while none of that has reduced opportunities for much faster, lower-power chips, it has significantly shifted the dynamics for their design and manufacturing. Rather than just different process nodes and half ... » read more

Chip Industry Earnings: A Mixed Bag

By Linda Christensen - 28 Oct, 2022 - Comments: 0

Editor's Note: Updated the week of Oct. 31 and Nov. 7 for additional earnings releases. Although most companies reported revenue growth, this latest round of chip industry earnings releases reflected a few major themes: Lower future quarter guidance to varying degrees, due to the recent U.S. export restrictions related to China; Negative impact of the inflationary environment on corn... » read more

Week In Review: Design, Low Power

By Marie C. Baca - 28 Oct, 2022 - Comments: 0

Tools and IP Scandinavian researchers used a laser-powered chip to transmit about 1.84 petabytes of data over a fiber optic cable in one second. The scientists said the technology could lead to faster broadband speeds and reduce the amount of energy used to keep the internet running. Imec said the semiconductor industry is likely to see increasing separation of power delivery and signal rou... » read more

Fabless IDMs Redefine The Leading Edge

By Marie C. Baca - 27 Oct, 2022 - Comments: 0

Large systems companies are looking more like integrated device manufacturers, designing their own advanced chips, packages, and systems for internal use. But because these are not pure-play chip companies, they are disrupting a 10-year cadence of customization and standardization that has defined the chip industry from its inception, and extending the period of innovation without the associate... » read more

Blog Review: Oct. 26

By Jesse Allen - 26 Oct, 2022 - Comments: 0

Synopsys' Teng-Kiat Lee and Sandeep Mehndiratta argue that IC design in the cloud can support an existing on-prem strategy, enable large and small enterprises to manage cost and capacity more effectively, and offer security for valuable semiconductor IP. Siemens EDA's Chris Spear finds that SystemVerilog classes are a good way to encapsulate both variables and the routines that operates on t... » read more

Securing Accelerator Blades For Datacenter AI/ML Workloads

By Emma-Jane Crozier - 25 Oct, 2022 - Comments: 0

Data centers handle huge amounts of AI/ML training and inference workloads for their individual customers. Such a vast number of workloads calls for efficient processing, and to handle these workloads we have seen many new solutions emerge in the market. One of these solutions is pluggable accelerator blades, often deployed in massively parallel arrays, that implement the latest state-of-the-ar... » read more

Chip Challenges In The Metaverse

By Marie C. Baca and Ed Sperling - 24 Oct, 2022 - Comments: 0

The metaverse is pushing the limits of chip design, despite uncertainty about how much raw horsepower these devices ultimately will require to deliver an immersive blend of augmented, virtual, and mixed reality. The big challenge in developing these systems is the ability to process mixed data types in real time while the data moves uninterrupted at lightning speed. That requires the integra... » read more

Week In Review: Design, Low Power

By Marie C. Baca - 21 Oct, 2022 - Comments: 0

Tools and IP Electronic system design revenue hit a record $3.75 billion in the second quarter, according to a report from ESD Alliance, a SEMI Technology Community. That number represents a 17.5% year-over-year increase. Walden C. Rhines, the report’s executive sponsor, said it was the largest such jump in over a decade and that all product categories and geographic regions recorded second ... » read more

HBM3 In The Data Center

By Ed Sperling - 17 Oct, 2022 - Comments: 0

Frank Ferro, senior director of product management at Rambus, talks about the forthcoming HBM3 standard, why this is so essential for AI chips and where the bottlenecks are today, what kinds of challenges are involved in working with this memory, and what impact chiplets and near-memory compute will have on HBM and bandwidth. » read more

Foundational Changes In Chip Architectures

By Brian Bailey - 13 Oct, 2022 - Comments: 5

We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

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Chip Design Shifts As Fundamental Laws Run Out Of Steam

Chip Industry Earnings: A Mixed Bag

Week In Review: Design, Low Power

Fabless IDMs Redefine The Leading Edge

Blog Review: Oct. 26

Securing Accelerator Blades For Datacenter AI/ML Workloads

Chip Challenges In The Metaverse

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Foundational Changes In Chip Architectures

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