tag: reliability

New Approaches For Reliability
By Ed Sperling - 28 Mar, 2014 - Comments: 0

The definition of reliability hasn’t budged since the invention of the IC, but how to achieve it is starting to change. In safety-critical systems, as well as in markets such as aerospace, demands for reliability are so rigorous that they often require redundant circuitry—and for good reason. A PanAmSat malfunction in 1998 caused by tin whisker growth wiped out pagers for 45 million use... » read more

Flawed Research?
By Brian Bailey - 09 Dec, 2013 - Comments: 0

Soft errors were first talked about a long time ago and [getkc id="22" kc_name="memories"], which are the most susceptible to this type of error due to their finer geometries and tighter packing, have long included protection from such errors. But the scare has proven to be larger than the real problem. However, as geometries shrink, we are again hearing about the potential problems. Researc... » read more

Executive Briefing: Andrew Yang
By Ed Sperling - 09 May, 2013 - Comments: 0

By Ed Sperling Andrew Yang, president of ANSYS subsidiary Apache Design, sat down with Low-Power/High-Performance Engineering to talk about why power is becoming so important and where the future challenges lie. What follows are excerpts of that conversation. LPHP: What’s the most important issue these days for chipmakers? Yang: According to the feedback we’ve gotten from our customer... » read more

Challenges In IC And Electronic Systems Verification
By Aveek Sarkar - 09 May, 2013 - Comments: 0

Power efficiency, unrealistic schedules, and cost-down considerations are increasingly the top challenges design teams must meet to deliver next generation electronic systems, whether it is for the mobile, server, or automotive market. In addition, a successful chip tapeout does not guarantee the eventual end-product’s success—there are many variables to take into account. In the first p... » read more

New Issues In Signoff
By Ed Sperling - 14 Feb, 2013 - Comments: 0

By Ed Sperling Signoff has always been a challenge at every stage of an SoC design flow. No matter how good a design looks, or how well a prototype works, there are still problems that can crop up at any stage of the design flow all the way into manufacturing that can leave engineering teams shaking their heads. Even at mainstream process nodes, respins are common. At advanced nodes—part... » read more

Leveraging The Past
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler It’s easy to forget that not every design today is targeted at 20nm, given the amount of focus put on the bleeding edge of technology. But in fact a large number of designs utilize the stability and reliability of older manufacturing nodes, as well as lower mask costs, by incorporating new design and verification techniques, with 2.5D designs being a prime example. ... » read more

Experts At The Table: The Reliability Factor
By Ed Sperling - 28 Jan, 2010 - Comments: 0

Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: Is a more complex supply chain cau... » read more

Experts At The Table: The Reliability Factor
By Ed Sperling - 22 Jan, 2010 - Comments: 0

Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high-reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: As we push to the next process nod... » read more

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