Improving Concurrent Chip Design, Manufacturing, And Test Flows

By Ann Mutschler - 28 Nov, 2022 - Comments: 0

Semiconductor design, manufacturing, and test are becoming much more tightly integrated as the chip industry seeks to optimize designs using fewer engineers, setting the stage for greater efficiencies and potentially lower chip costs without just relying on economies of scale. The glue between these various processes is data, and the chip industry is working to weave together various steps t... » read more

Addressing Three Big Challenges In Silicon Realization

By Bradley Geden - 22 Nov, 2022 - Comments: 0

There is no better way to gain insight into prevailing technical challenges than bringing together industry experts to share experiences and proposed solutions. Silicon realization—the ability to design and build today’s complex semiconductors—is one domain with no shortage of challenges. The quest for the best power, performance, and area, and delivery of first-time-right silicon, requir... » read more

The Rise Of Copper Wires In Automotive ICs

By Prasad Dhond - 17 Nov, 2022 - Comments: 0

In 2011, the price of Gold (Au) surged to $1900/oz which had a drastic impact on Wirebonded ICs using Au wires. IC suppliers scrambled to convert from Au to copper (Cu) wire on as many products as they could. However, automotive ICs were reluctant to make the jump due to lack of reliability data and performance track-record. However, today’s automotive ICs are big users of Cu wires driven by ... » read more

Ensuring Memory Reliability Throughout the Silicon Lifecycle

By Anand Thiruvengadam - 14 Nov, 2022 - Comments: 0

By Anand Thiruvengadam and Guy Cortez Memories are everywhere in modern electronics. Discrete memory chips account for much of the space on printed circuit boards (PCBs). Embedded memories consume much of the floorplan in system-on-chip (SoC) devices. Many multi-die chip configurations, including 2.5D/3DIC devices, are driven by the need for faster memory access. Designing and verifying memo... » read more

Next Steps For Improving Yield

By Laura Peters - 08 Nov, 2022 - Comments: 0

Chipmakers are ramping new tools and methodologies to achieve sufficient yield faster, despite smaller device dimensions, a growing number of systematic defects, immense data volumes, and massive competitive pressure. Whether a 3nm process is ramping, or a 28nm process is being tuned, the focus is on reducing defectivity. The challenge is to rapidly identify indicators that can improve yield... » read more

Automated Optical Inspection

By Ed Sperling - 07 Nov, 2022 - Comments: 0

Building good automated models for inspection require more data to be collected, both good and bad. Vijay Thangamariappan, R&D engineer at Advantest, explains how to develop models for automating optical inspection, using a multi-thousand pin socket as an example for how machine learning has helped reduce the return rate due to defects from 2% down to zero. He also explains how to achieve t... » read more

Bug-Free Designs

By Brian Bailey - 27 Oct, 2022 - Comments: 0

It is possible in theory to create a design with no bugs, but it's impractical, unnecessary, and extremely difficult to prove for bugs you care about. The problem is intractable because the potential state space is enormous for any practical design. The industry has devised ways to handle this complexity, but each has limitations, makes assumptions, and employs techniques that abstract the p... » read more

EVs Raise Energy, Power, And Thermal IC Design Challenges

By Ann Mutschler - 06 Oct, 2022 - Comments: 0

The transition to electric vehicles is putting pressure on power grids to produce more energy and on vehicles to use that energy much more efficiently, creating a gargantuan set of challenges that will affect every segment of the automotive world, the infrastructure that supports it, and the chips that are required to make all of this work. From a semiconductor standpoint, improvements in th... » read more

Robust Latch Hardened Against QNUs for Safety-Critical Applications in 22nm CMOS Technology

By Technical Paper Link - 07 Sep, 2022 - Comments: 0

A technical paper titled "Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS" was just published by researchers at Anhui University, Hefei University of Technology, Anhui Polytechnic University, Kyushu Institute of Technology, and the University of Montpellier/CNRS. Abstract: "With the aggressive reduction of CMOS transistor feature sizes, the soft ... » read more

TCAD-Based Radiation Modeling Technique For Reliable Aerospace Chips

By Ian Land - 28 Jul, 2022 - Comments: 0

By Ian Land and Ricardo Borges We demand a lot from the electronic components that bring our devices and systems to life. This is particularly true when it comes to semiconductors for space applications. From satellites to spacecraft, aerospace and defense equipment must tolerate the most extreme of operating conditions in order to perform their jobs safely and reliably. How do you ensure... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.