tag: reliability

Solving The Reliability Problem Of Memristor-Based Artificial Neural Networks
By Technical Paper Link - 19 Mar, 2023 - Comments: 0

A technical paper titled "ReMeCo: Reliable Memristor-Based in-Memory Neuromorphic Computation" was published by researchers at Eindhoven University of Technology, University of Tehran, and USC. Abstract: "Memristor-based in-memory neuromorphic computing systems promise a highly efficient implementation of vector-matrix multiplications, commonly used in artificial neural networks (ANNs). H... » read more

Uneven Circuit Aging Becoming A Bigger Problem
By Ann Mutschler - 09 Mar, 2023 - Comments: 0

Circuit aging is emerging as a first-order design challenge as engineering teams look for new ways to improve reliability and ensure the functionality of chips throughout their expected lifetimes. The need for reliability is obvious in data centers and automobiles, where a chip failure could result in downtime or injury. It also is increasingly important in mobile and consumer electronics, w... » read more

How To Build Resilience Into Chips
By Ed Sperling and Ann Mutschler - 27 Feb, 2023 - Comments: 0

Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for continued improvements in performance and power, but it's also contributing to unusual and often unpredictable errors in hardware that are extremely difficult to find. The sources of those errors can include anything from timing errors in a particular sequence, to gaps in bonds between chi... » read more

Safety, Security, And Reliability Of AI In Autos
By Ed Sperling - 22 Feb, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about security, aging, and safety in automotive AI systems, with Geoff Tate, CEO of Flex Logix; Veerbhan Kheterpal, CEO of Quadric; Steve Teig, CEO of Perceive; and Kurt Busch, CEO of Syntiant. What follows are excerpts of that conversation, which was held in front of a live audience at DesignCon. Part one of this discussion is he... » read more

Bump Reliability is Challenged By Latent Defects
By Karen Heyman - 07 Feb, 2023 - Comments: 0

Thermal stress is a well-known problem in advanced packaging, along with the challenges of mechanical stress. Both are exacerbated by heterogenous integration, which often requires mingling materials with incompatible coefficients of thermal expansion (CTE). Effects are already showing up and will likely only get worse as package densities increase beyond 1,000 bumps per chip. “You comb... » read more

Ramping Up IC Predictive Maintenance
By Anne Meixner - 07 Feb, 2023 - Comments: 0

The chip industry is starting to add technology that can predict impending failures early enough to stave off serious problems, both in manufacturing and in the field. Engineers increasingly are employing in-circuit monitors embedded in SoC designs to catch device failures earlier in the production flow. But for ICs in the field, data tracing from design to application use only recently has ... » read more

Where And Why AI Makes Sense In Cars
By Ed Sperling - 02 Feb, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about where AI makes sense in automotive and what are the main challenges, with Geoff Tate, CEO of Flex Logix; Veerbhan Kheterpal, CEO of Quadric; Steve Teig, CEO of Perceive; and Kurt Busch, CEO of Syntiant. What follows are excerpts of that conversation, which were held in front of a live audience at DesignCon. Part two of this... » read more

Designing For Multiple Die
By Ann Mutschler - 21 Dec, 2022 - Comments: 1

Integrating multiple die or chiplets into a package is proving to be very different than putting them on the same die, where everything is developed at the same node using the same foundry process. As designs become more heterogeneous and disaggregated, they need to be modeled, properly floor-planned, verified, and debugged in the context of a system, rather than as individual components. Typi... » read more

Efficient Trace In RISC-V
By Ed Sperling - 19 Dec, 2022 - Comments: 0

Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what's needed for debug and trace in context, including the need for unobtrusive observation at full speed, what to trace and when to trace it, and how embedded IP can identify to report which branches are tak... » read more

The March Toward Chiplets
By Ed Sperling and Karen Heyman - 15 Dec, 2022 - Comments: 0

The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

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