tag: SEM

Applications, Challenges For Using AI In Fabs
By Mark LaPedus - 14 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss chip scaling, transistors, new architectures, and packaging with Jerry Chen, head of global business development for manufacturing & industrials at Nvidia; David Fried, vice president of computational products at Lam Research; Mark Shirey, vice president of marketing and applications at KLA; and Aki Fujimura, CEO of D2S. Wh... » read more

Manufacturing Bits: Dec. 3
By Mark LaPedus - 03 Dec, 2019 - Comments: 0

Microscopic movie star Using a 3D printer and a scanning electron microscope (SEM), a group has created a short animated film featuring the world’s smallest 3D figurine. The stop motion film, called Stardust Odyssey, features a 3D human-like figurine with a height of 300 microns, or close to the size of a grain of dust. This beat the previous record for the smallest figure in a film. N... » read more

Deprocessing And SEM For Semiconductor Failure Analysis
By Helle Ronsberg - 09 Jul, 2019 - Comments: 0

A typical semiconductor is fabricated from metal and barrier layers separated by passivation layers. A further glassivation and/or polyimide layer on top of these provides environmental and mechanical protection. Optical microscopes By using optical microscopy, the semiconductor die can be inspected for failure modes such as top-down visible crack degradation, melt-down of metal conductors,... » read more

SEM Analysis Reveals Real Cause Of Chip Failure
By DELTA, a part of FORCE Technology - 08 Jul, 2019 - Comments: 0

When it comes to ASIC design, DELTA’s motto is “first time right”. When the first wafers from the wafer fab showed severe electrical malfunction, we were extremely frustrated. To investigate the failure, the design team started electrical characterization of prototypes. Overall, a short between power and ground was observed and furthermore RF inputs exhibited strange VI characteristics. T... » read more

Inside Panel-Level Fan-Out Technology
By Mark LaPedus - 11 Sep, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss panel-level fan-out packaging technology with Tanja Braun, deputy group manager at the Fraunhofer Institute for Reliability and Microintegration IZM, and Michael Töpper, business development manager at Fraunhofer IZM. Braun is responsible for the Panel Level Packaging Consortium at Fraunhofer IZM, as well as the group manager for assembly and encap... » read more

Big Changes In Patterning
By Ed Sperling - 22 Feb, 2017 - Comments: 0

Aki Fujimura, CEO of [getentity id="22864" comment="D2S"], sat down with Semiconductor Engineering to discuss patterning issues at 10nm and below, including mask alignment, the need for GPU acceleration, EUV's future impact on the total number of masks, and what the re-introduction of curvilinear shapes will mean for design. SE: Patterning issues are getting a lot of attention at 10nm and 7n... » read more

Manufacturing Bits: Feb. 17
By Mark LaPedus - 17 Feb, 2015 - Comments: 0

Swedish nano Sweden’s Lund University plans to build a pilot production facility for startups in the field of nanotechnology. The facility would be used for Swedish companies and researchers to build products. This is for companies who do not have the funds to build their own facilities or buy expensive equipment. The project originates from the successful research into nanowires at Lund ... » read more

Manufacturing Bits: May 13
By Mark LaPedus - 13 May, 2014 - Comments: 0

Telling a FIB The National Institute of Standards and Technology (NIST) has built the first low-energy focused ion beam (FIB) microscope that uses a lithium ion source. Still in the R&D stage, the FIB microscope from NIST could be used to examine adjacent materials that are chemically different and identify the elements that make them up. The FIB microscope uses an ion source based on p... » read more

The Next Limiting Factor
By Ann Mutschler - 11 Apr, 2013 - Comments: 0

It’s an interesting time in the semiconductor industry. Nodes continue to shrink, we’re on the verge of adopting a new type of transistor (finFET), and there’s also a shift away from planar CMOS – to name a few things on the horizon. What’s also extremely interesting is how design automation and semiconductor manufacturing technology continues to keep the pace with it all. However,... » read more

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