tag: Siemens EDA

New Concepts Required For Security Verification
By Brian Bailey - 28 Aug, 2023 - Comments: 0

Verification for security requires new practices in both the development and verification flows, but tools and methodologies to enable this are rudimentary today. Flows are becoming more complex, especially when they span multiple development groups. Security is special in that it is pervasive throughout the development process, requiring both positive and negative verification. Positive ver... » read more

Optimizing IC Designs For Real-World Use Cases
By Brian Bailey - 24 Aug, 2023 - Comments: 0

Semiconductor systems are becoming more focused on power, performance, and area for the primary scenarios they are likely to see in real-world applications, but increasingly at the expense of secondary tasks. This is happening at all levels of abstraction and all stages of the design flow. At the highest level, processors are being optimized to run a given set of software. RISC-V is one of t... » read more

AI, Rising Chip Complexity Complicate Prototyping
By Karen Heyman - 24 Aug, 2023 - Comments: 0

Prototyping, an essential technology for designing complex chips in tight market windows, is becoming significantly more challenging for the growing number of designs that include AI/ML. Prototyping remains one of the foundational pillars of the whole shift left movement, allowing software to be developed and tested before actual silicon is available. That, in turn, enables multiple teams t... » read more

Why Shift Left?
By Michael White - 24 Aug, 2023 - Comments: 0

As every integrated circuit (IC) design company knows, the faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. Meeting tapeout schedules improves a company’s chances of reaching their market targets. But as companies create larger and more complex ICs and move to advanced process nodes, the challenge of achieving t... » read more

Preparing For Commercial Chiplets
By Ed Sperling - 24 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the path to commercialization of chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts of tha... » read more

The Four Foundational Pillars Of Calibre Shift Left Solutions For IC Design And Implementation Flows
By Siemens EDA - 23 Aug, 2023 - Comments: 0

As the semiconductor industry approaches a new era of digital transformation, design companies everywhere are turning to shift left strategies to address challenges that reduce design cycles while maximizing productivity, optimizing resource efficiency, ensuring design quality, and accelerating time to market. To overcome these challenges in IC design, Calibre shift left technologies include to... » read more

Blog Review: Aug. 23
By Jesse Allen - 23 Aug, 2023 - Comments: 0

Siemens' Stephen Chavez discusses best practices when it comes to thermal analysis for PCB design, including component placement and close collaboration between mechanical and electrical engineering disciplines. Synopsys' Gary Ruggles, Richard Solomon, and Varun Agrawal introduce the Compute Express Link (CXL) specification and how it could help improve latency through computational offloadi... » read more

Week In Review: Design, Low Power
By Susan Rambo - 18 Aug, 2023 - Comments: 0

Synopsys’ board of directors appointed Sassine Ghazi as president and chief executive officer effective on Jan. 1, 2024. Ghazi, who is currently the COO, will succeed Aart de Geus, co-founder, chair, and CEO of Synopsys, who will then become the executive chair of board of directors. IBM Research introduced  an energy-efficient mixed-signal analog AI chip for DNN inferencing and demonstra... » read more

Tradeoffs Between On-Premise And On-Cloud Design
By Ann Mutschler - 16 Aug, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down discuss how and why companies are dividing up work on-premise and in the cloud, and what to watch out for, with Philip Steinke, fellow, CAD infrastructure and physical design at AMD; Mahesh Turaga, vice president of business development for cloud at Cadence Design Systems; Richard Ho, vice president hardware engineering at Lightmatter; Cr... » read more

Blog Review: Aug. 16
By Jesse Allen - 16 Aug, 2023 - Comments: 0

Synopsys' Johannes Stahl and Tim Kogel suggest that multi-die systems require a new approach at the architecture planning phase and why chip designers can’t ignore physical effects such as layout, power, temperature, or IR-drop. Siemens' Rich Edelman argues for using the waveform window in a GUI rather than $display when debugging UVM. Cadence's Paul Scannell stresses the need for diver... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy