tag: Siemens EDA

Processor Tradeoffs For AI Workloads
By Ann Mutschler - 10 Aug, 2023 - Comments: 0

AI is forcing fundamental shifts in chips used in data centers and in the tools used to design them, but it also is creating gaps between the speed at which that technology advances and the demands from customers. These shifts started gradually, but they have accelerated and multiplied over the past year with the rollout of ChatGPT and other large language models. There is suddenly much more... » read more

MRAM Getting More Attention At Smallest Nodes
By Karen Heyman - 10 Aug, 2023 - Comments: 2

Magneto-resistive RAM (MRAM) appears to be gaining traction at the most advanced nodes, in part because of recent improvements in the memory itself and in part because new markets require solutions for which MRAM may be uniquely qualified. There are still plenty of skeptics when it comes to MRAM, and lots of potential competitors. That has limited MRAM to a niche role over the past couple de... » read more

Fast, Accurate, Automated Via Insertion During Design Implementation Requires Foundry Rule Compliance
By Jimmy Tien - 10 Aug, 2023 - Comments: 0

As the scaling of silicon technology proceeds, via resistance is becoming a dominant factor in integrated circuit (IC) yield, performance, and reliability. At advanced nodes, interconnects and via dimensions decrease, while the number of metallization layers increases. To moderate the impact of via resistance on yield and reliability and reduce electromigration (EM) and voltage drop (IR) effect... » read more

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing
By The SE Staff - 07 Aug, 2023 - Comments: 0

Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

A Survey Of Machine Learning Applications In Functional Verification
By Siemens EDA - 02 Aug, 2023 - Comments: 0

Functional verification is computationally and data-intensive by nature, making it a natural target of machine learning applications. This paper provides a comprehensive and up-to-date analysis of FV problems addressable by ML. Among the various ML techniques and algorithms, several emerging ones have demonstrated outstanding potential in FV. Yet despite the promising research results, criti... » read more

Blog Review: Aug. 2
By Jesse Allen - 02 Aug, 2023 - Comments: 0

Siemens' Katie Tormala points to the need for die attach thermal testing to ensure efficient removal of heat dissipation from power electronics components to prevent premature failure or thermal runaway. Synopsys's Dermott Lynch notes that over 30% of semiconductor failures are attributed to electrostatic discharge, with damage ranging from leakages and shorts to junction and metallization b... » read more

Shift Left, Extend Right, Stretch Sideways
By Brian Bailey - 27 Jul, 2023 - Comments: 0

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns, and we are increasingly seeing interlinking within those concerns. ... » read more

Context-Aware Analysis Can Automatically Protect Critical Nets And Devices During Fill Insertion
By Dina Medhat - 27 Jul, 2023 - Comments: 0

Context-aware physical verification (PV) is a relatively new addition to traditional PV flows, but it has quickly become a critical and essential technology that addresses the increasing complexity of geometrical checks used in both established and emerging integrated circuit (IC) technologies. Traditional electronic design automation (EDA) verification tools handle either the physical verifica... » read more

Placement And CTS Techniques For High-Performance Computing Designs
By Siemens EDA - 26 Jul, 2023 - Comments: 0

This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Blog Review: July 26
By Jesse Allen - 26 Jul, 2023 - Comments: 0

Siemens' Chris Spear shows how to make a group of specialized classes in SystemVerilog. Synopsys' Guy Cortez and Randy Fish consider what a silicon lifecycle management strategy looks like for SoCs deployed in HPC and data center environments. Cadence's Veena Parthan provides a primer on writing Python scripts for Fidelity, including API descriptions and different sets of packages to acce... » read more

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