tag: Siemens

Re-Architecting SerDes
By Brian Bailey - 10 Dec, 2020 - Comments: 0

Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally implemented as an analog circuit, SerDes technology has been difficult to scale, while low voltages, variation, and noise are making it more difficult to yield sufficiently. So to remain releva... » read more

Low Power Still Leads, But Energy Emerges As Future Focus
By Ann Mutschler - 10 Dec, 2020 - Comments: 1

In 2021 and beyond, chips used in smartphones, digital appliances, and nearly all major applications will need to go on a diet. As the amount of data being generated continues to swell, more processors are being added everywhere to sift through that data to determine what's useful, what isn't, and how to distribute it. All of that uses power, and not all of it is being done as efficiently as... » read more

An Integrated Approach To Power Domain And Clock Domain Crossing Verification
By Mentor, a Siemens Business - 09 Dec, 2020 - Comments: 0

Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control... » read more

Blog Review: Dec. 9
By Jesse Allen - 09 Dec, 2020 - Comments: 0

Arm's Benoit Labbe digs into designing a power converter for Arm Research's ultra-low power M0N0 microcontroller, with a focus on optimal efficiency and leakage constraints. Mentor's Harry Foster tries to get a sense of how much effort is spent in verification of FPGAs by looking at the amount of time spent and number of engineers on a project. Cadence's Paul McLellan listens in as Odile ... » read more

Digital Test Bulks Up – Or Down
By Bryon Moyer - 08 Dec, 2020 - Comments: 2

Large digital integrated circuits are becoming harder to test in a time- and cost-efficient manner. AI chips, in particular, have tiled architectures that are putting pressure on older testing strategies due to the volume of test vectors required. In some cases, these chips are so large that they exceed reticle size, requiring them to be stitched together. New testing efficiencies are needed... » read more

Using ICs To Shrink Auto’s Carbon Footprint
By Ann Mutschler - 03 Dec, 2020 - Comments: 3

A large portion of the burden for reducing greenhouse gases is being handed off to makers of automotive chips and systems, which are being tasked to make vehicles drive further using less energy and with zero emissions. The effort is critical in battling climate change. According to the U.S. Environmental Protection Agency, the transportation sector represented 28.2% of 2018 greenhouse gas e... » read more

A New Method For Electrical Systems Design
By Nigel Hughes - 03 Dec, 2020 - Comments: 0

Electrical system complexity is reaching a tipping point across industries, from modern passenger vehicles to sophisticated industrial machines that can now contain nearly 5,000 wiring harnesses. The electrical systems of these machines contain multiple networks, thousands of sensors and actuators, miles of wiring and tens of thousands of discrete components (figure 1). Designing these complex ... » read more

Blockchain Attempts To Secure The Supply Chain
By Bryon Moyer - 03 Dec, 2020 - Comments: 0

Blockchain technology is starting to be deployed more widely In the battle against counterfeiting, often coupled with component IDs to allow device authentication. Securing the supply chain is a complex challenge, particularly as more IP from more vendors in more locations makes its way into chips, packages or even systems. Being able to attest to the history of the device to prove its prove... » read more

Systematic Methodology To Solve Reset Challenges In Automotive SoCs
By Mentor, a Siemens Business - 02 Dec, 2020 - Comments: 0

Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. The conventional clock domain and CDC verification methodologies cannot identify such critical bugs. In this paper, we prese... » read more

Blog Review: Dec. 2
By Jesse Allen - 02 Dec, 2020 - Comments: 0

Mentor's Harry Foster investigates the effectiveness of today’s FPGA verification processes in terms of nontrivial bug escapes into production as part of the 2020 Wilson Research Group Functional Verification Study. Synopsys' Chris Clark points to how integral sensors are to the modern vehicle and key design considerations for making them more effective, safe, and reliable. Cadence's Pa... » read more

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