Efficient Sensitivity-Aware Assessment Of High-Speed Links Using PCE And Implications For COM


This technical white paper, originally presented at DesignCon, investigates the challenges of increased data rates and reduced margins in high-speed link design. Section 1: Introduction Section 2: State of the Art Link Evaluation and Assessment of Parameter Variability Section 3: Proposed Modeling Framework Section 4: Sensitivity Analysis of a High-Speed Interconnect Section 5: Conclusio... » read more

Formal Verification Becoming Critical To Auto Security, Safety


Formal verification is poised to take on an increasingly significant role in automotive security, building upon its already widespread use in safety-critical applications. Formal has been essential component of automotive semiconductor verification for some time. Even before the advent of ADAS and semi-autonomous vehicles — and functional safety specifications like ISO 26262 and cybersecur... » read more

Week In Review: Design, Low Power


Tools & IP Arm unveiled the Cortex-R82, a 64-bit, Linux-capable Cortex-R processor targeted for next-generation enterprise and computational storage solutions. The Cortex-R82 provides 2x performance depending on workload compared to previous Cortex-R generations and provides access of up to 1TB of DRAM for advanced data processing in storage applications. It offers an optional memory manag... » read more

Software-Defined Vehicles


Automobiles long ago stopped being purely mechanical systems. But as more components are electrified — and, in particular, as the drivetrain is electrified — cars are becoming software-defined vehicles. Some think of such cars as computers on wheels. But as these systems continue to evolve, adding in more assisted and semi-autonomous capabilities, that comparison is looking increasingly ... » read more

Using Critical Area To Boost Automotive IC Test Quality


To compete in the fast-growing market for automotive ICs, semiconductor companies need to address new challenges across the entire design flow. To meet the ISO 26262 goal of zero defective parts per million (DPPM), DFT engineers have embraced new test pattern types, including cell-aware, interconnect, and inter-cell bridge (cell neighborhood). But the traditional methods of choosing the types o... » read more

Interconnects Emerge As Key Concern For Performance


Interconnects are becoming increasingly challenging to design, implement and test as the amount of data skyrockets and the ability to move that data through denser arrays of compute elements and memories becomes more difficult. The idea of an interconnect is rather simple, but ask two people what constitutes an interconnect and you're likely to get very different answers. Interconnects are e... » read more

All-in-One Vs. Point Tools For Security


Security remains an urgent concern for builders of any system that might tempt attackers, but designers find themselves faced with a bewildering array of security options. Some of those are point solutions for specific pieces of the security puzzle. Others bill themselves as all-in-one, where the whole puzzle filled in. Which approach is best depends on the resources you have available and y... » read more

Critical Area-Based Test Pattern Optimization For High-Quality Test


Among the challenges for DFT engineers is how to set a target metric for ATPG and how to choose the best set of patterns. Traditional coverage targets based on the number of faults detected doesn’t consider the likelihood of one fault occurring compared to another. Tessent developed total critical area ATPG technology that enables the sorting and ordering of patterns based on their likelihood... » read more

Components For Open-Source Verification


Defining an open-source verification methodology is a lot more difficult than just developing an open-source simulator. This is the reality facing open-source hardware such as RISC-V. Some people may be asking for the corresponding open-source verification, but that is a much tougher problem — and it is not going to be solved in the short term. Part one examined the reasons why open-source... » read more

Blog Review: Sept. 2


Arm's Pranay Prabhat highlights research into zero-power or low-power sensing devices and work toward designing a microcontroller that could fit with DARPA N-ZERO sensors. Mentor's Shivani Joshi provides a primer on the ODB++ standard data exchange file format that generates PCB design data files for use in fabrication, assembly, and test. Cadence's Paul McLellan shares some highlights fr... » read more

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