Accelerate Complex Algorithms With Adaptable Signal Processing Solutions

By Jayson Bethurem - 10 Mar, 2024 - Comments: 0

Technology is continuously advancing and exponentially increasing the amount of data produced. Data comes from a multitude of sources and formats, requiring systems to process different algorithms. Each of these algorithms present their own challenges including low-latency and deterministic processing to keep up with incoming data rates and rapid response time. Considering that many of these se... » read more

A Survey Of Recent Advances In Spiking Neural Networks From Algorithms To HW Acceleration

By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology” was published by researchers at Intel Labs, University of California Santa Cruz, University of Wisconsin-Madison, and University of Southern California. Abstract: "Neuromorphic computing and, in particular, spiking neural networks (SNNs) have becom... » read more

Evolution Of Equalization Techniques In High-Speed SerDes For Extended Reaches

By Madhumita Sanyal - 20 Jul, 2023 - Comments: 0

The relentless demand for massive amounts of data is accelerating the pace of high-performance computing (HPC) within the high-speed Ethernet realm. This escalation, in turn, intensified the complexity associated with designing networking SoCs, including switches, NICs, retimers, and pluggable modules. Such growth is accelerating the demand for bandwidth hungry applications to transition from 4... » read more

Improved DSP And AI Performance On An MCU Core

By Eldar Sido - 27 Apr, 2023 - Comments: 0

In the world of embedded devices, there's a growing demand for advanced machine learning and signal processing capabilities. ARM Cortex-M85, the latest general-purpose core, aims to meet these demands with its 32-bit Armv8.1-M architecture, offering high performance and power efficiency. The core's Helium technology, M-profile vector extension (MVE), provides significant uplift for ML/DSP appl... » read more

Advances In Reconfigurable Intelligent Surfaces Hardware Architectures: Beyond 5G/6G

By Technical Paper Link - 19 Aug, 2022 - Comments: 0

This technical paper titled "Reconfigurable Intelligent Surfaces for Wireless Communications: Overview of Hardware Designs, Channel Models, and Estimation Techniques" is from researchers at IEEE. The paper's abstract states "we overview and taxonomize the latest advances in RIS [reconfigurable intelligent surfaces] hardware architectures as well as the most recent developments in the modelin... » read more

The speed limit of optoelectronics

By Technical Paper Link - 29 Mar, 2022 - Comments: 0

Abstract "Light-field driven charge motion links semiconductor technology to electric fields with attosecond temporal control. Motivated by ultimate-speed electron-based signal processing, strong-field excitation has been identified viable for the ultrafast manipulation of a solid’s electronic properties but found to evoke perplexing post-excitation dynamics. Here, we report on single-photon... » read more

Improving Performance And Simplifying Coding With XY Memory’s Implicit Parallelism

By Synopsys - 08 Mar, 2022 - Comments: 0

Instruction-level Parallelism (ILP) refers to design techniques that enable more than one RISC instruction to be executed simultaneously in the same instruction, which boosts processor performance by increasing the amount of work done in a given time interval, thereby increasing the throughput. This parallelism can be explicit, where each additional instruction is explicitly part of the instruc... » read more

More Multiply-Accumulate Operations Everywhere

By Ed Sperling - 02 Apr, 2020 - Comments: 1

Geoff Tate, CEO of Flex Logix, sat down with Semiconductor Engineering to talk about how to build programmable edge inferencing chips, embedded FPGAs, where the markets are developing for both, and how the picture will change over the next few years. SE: What do you have to think about when you're designing a programmable inferencing chip? Tate: With a traditional FPGA architecture you ha... » read more

Low Ripple Notch Filter Designs Using Apodized Thickness Modulation

By Veeco - 21 Mar, 2019 - Comments: 0

An apodized discrete layer thickness design method for notch filters is presented. The method produces error tolerant designs with low ripple in the pass band regions without any additional numerical optimization. Sample designs are presented. Multiple approaches have been used in the past for producing notch filters (also called minus filters). The two main approaches can be grouped into ru... » read more

Using Analog For AI

By Brian Bailey - 14 Mar, 2019 - Comments: 0

If the only tool you have is a hammer, everything looks like a nail. But development of artificial intelligence (AI) applications and the compute platforms for them may be overlooking an alternative technology—analog. The semiconductor industry has a firm understanding of digital electronics and has been very successful making it scale. It is predictable, has good yield, and while every de... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?