tag: SIP

Warpage Of Compression Molded SiP Strips
By JCET - 17 Feb, 2022 - Comments: 0

By Eric Ouyang, Yonghyuk Jeong, JaeMyong Kim, JaePil Kim, OhYoung Kwon, and Michael Liu of JCET; and Susan Lin, Jenn An Wang, Anthony Yang, and Eric Yang of CoreTech System (Moldex3D). Abstract System-in-Package (SiP) technology has been used for a wide range of electronic devices, but the warpage behavior of the package can be difficult to control and predict due to complex manufacturing p... » read more

Advanced Packaging Shifts Design Focus To System Level
By Ann Mutschler - 23 Nov, 2021 - Comments: 0

Growing momentum for advanced packaging is shifting design from a die-centric focus toward integrated systems with multiple die, but it's also straining some EDA tools and methodologies and creating gaps in areas where none existed. These changes are causing churn in unexpected areas. For some chip companies, this has resulted in a slowdown in hiring of ASIC designers and an uptick in new jo... » read more

The New Technology Solutions For Advanced SiP Devices
By YongJai Seo - 18 Nov, 2021 - Comments: 0

For many years, System-in-Package (SiP) technology has been a focus for semiconductor packaging to address the ongoing market trend of system integration and size reduction. Today’s increased complexity and higher package density for SiP devices has driven the development of new packaging technologies. In response, compartmental shield technology makes it possible to put several functions int... » read more

A Broad Look Inside Advanced Packaging
By Mark LaPedus - 18 Nov, 2021 - Comments: 0

Choon Lee, chief technology officer of JCET, sat down with Semiconductor Engineering to talk about the semiconductor market, Moore’s Law, chiplets, fan-out packaging, and manufacturing issues. What follows are excerpts of that discussion. SE: Where are we in the semiconductor cycle right now? Lee: If you look at 2020, it was around 10% growth in the overall semiconductor industry. ... » read more

The New Technology Solutions For Advanced SiP Devices
By YongJai Seo - 21 Oct, 2021 - Comments: 0

For many years, system-in-package (SiP) technology has been a focus for semiconductor packaging to address the ongoing market trend of system integration and size reduction. Today’s increased complexity and higher package density for SiP devices has driven the development of new packaging technologies. In response, compartmental shield technology makes it possible to put several functions int... » read more

PCB And IC Technologies Meet In The Middle
By Bryon Moyer - 12 Oct, 2021 - Comments: 1

Surface-mount technology (SMT) is evolving far beyond its roots as a way of assembling packaged chips onto printed circuit boards without through-holes. It is now moving inside packages that will themselves be mounted on PCBs. But SMT for advanced packages isn’t the same as the SMT we’ve been used to. “Many systems include multiple ASICs, a lot of memory, and that's all integrated i... » read more

Fan-Out And Packaging Challenges
By Mark LaPedus - 06 Oct, 2021 - Comments: 2

Semiconductor Engineering sat down to discuss various IC packaging technologies, wafer-level and panel-level approaches, and the need for new materials with William Chen, a fellow at ASE; Michael Kelly, vice president of advanced packaging development and integration at Amkor; Richard Otte, president and CEO of Promex, the parent company of QP Technologies; Michael Liu, senior director of globa... » read more

System-In-Package Thrives In The Shadows
By Mark LaPedus - 16 Sep, 2021 - Comments: 0

IC packaging continues to play a big role in the development of new electronic products, particularly with system-in-package (SiP), a successful approach that continues to gain momentum — but mostly under the radar because it adds a competitive edge. With a SiP, several chips and other components are integrated into a package, enabling it to function as an electronic system or sub-system. ... » read more

Empowering RF Front End Cellular Innovations With DSMBGA
By Curtis Zwenger - 19 Aug, 2021 - Comments: 0

With the introduction of 5G, cellular frequency bands have increased considerably, requiring innovative solutions for the packaging of RF front-end modules for smartphones and other 5G-enabled devices. Double-sided, molded ball grid array (DSMBGA) is a prime example of such solutions. “With our DSMBGA platform, we’ve established a preferred advanced packaging solution for this domain,”... » read more

Hybrid System-Level Test For RF SiP
By Koji Miyauchi - 08 Jun, 2021 - Comments: 0

In recent years, the proliferation of the IoT has focused attention on low-power-wireless applications. IoT modules incorporating functions such as Bluetooth Low Energy (BLE) transceivers, MCUs, and power-management circuitry are becoming system-in-package (SiP) and even one-chip devices. Such devices increase the demand for a mass-production test environment that can measure them in a short ti... » read more

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