tag: Stanford University

Week In Review: Automotive, Security, Pervasive Computing
By Liz Allan - 23 Jun, 2023 - Comments: 0

Stellantis and Foxconn formed a 50/50 joint venture called SiliconAuto, to be headquartered in the Netherlands. The goal is to close the gap between supply and demand for chips used in computer-controlled features and modules, especially for electric vehicles (EVs). The U.S. Department of Justice created a National Security Cyber Section within its National Security Division to increase the ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Jun, 2023 - Comments: 0

Renesas Electronics completed its acquisition of Panthronics, a fabless company specializing in near-field communication (NFC) wireless products. Renesas has already incorporated Panthronics NFC technology into several solution reference designs for applications such as payment, IoT, asset tracking, and smart meters. The European Commission announced new funding for the semiconductor and mic... » read more

Rethinking Engineering Education In The U.S.
By Karen Heyman - 11 May, 2023 - Comments: 8

The CHIPS Act, as well as the ongoing need for talent, is causing both industry and academia in America to rethink engineering education, resulting in new approaches and stronger partnerships. As an example, Arizona State University (ASU) now has a Secure, Trusted, and Assured Microelectronics Center (STAM). The center offers an interdisciplinary approach to learning secure and trusted semic... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 03 Feb, 2023 - Comments: 0

Imec released its semiconductor roadmap, which calls for doubling compute power every six months to handle the data explosion and new data-intensive problems. Imec named five walls (scaling, memory, power, sustainability, cost) that need to be dismantled. The roadmap (below) stretches from 7nm to 0.2nm (2 angstroms) by 2036, and includes four generations of gate-all-around FETs followed by thre... » read more

Chip Industry’s Technical Paper Roundup: Dec. 13
By Linda Christensen - 13 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week.[table id=70 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us po... » read more

Neural Architecture & Hardware Accelerator Co-Design Framework (Princeton/ Stanford)
By Technical Paper Link - 12 Dec, 2022 - Comments: 0

A new technical paper titled "CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework" was published by researchers at Princeton University and Stanford University. "Recently, automated co-design of machine learning (ML) models and accelerator architectures has attracted significant attention from both the industry and academia. However, most co-design frameworks either... » read more

Chip Industry’s Technical Paper Roundup: Nov. 29
By Linda Christensen - 29 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=66 /]   Related Reading: Chip Industry’s Technical Paper Roundup: Nov. 21 New papers: lithography modeling; solving Rowhammer; energy-efficient batch normalization HW; 3-to-1 reconfigurable analog signal modulation circuit; lateral double magnetic tunnel junction; reduce branch mispredic... » read more

Phononic and Magnonic Properties of 1D MoI3 Nanowires
By Technical Paper Link - 28 Nov, 2022 - Comments: 0

A new technical paper titled "Elemental excitations in MoI3 one-dimensional van der Waals nanowires" was published by researchers at NIST, UC Riverside, University of Georgia, Theiss Research Inc, and Stanford University. "We described here the elemental excitations in crystals of MoI3 a vdW [van der Waals] material with a true-1D crystal structure. Our measurements reveal anomalous temperat... » read more

Opportunities and Challenges for Carbon Nanotube Transistors
By Technical Paper Link - 23 Nov, 2022 - Comments: 0

A new technical review paper titled "Carbon nanotube transistors: Making electronics from molecules" was published by researchers at Duke University, Northwestern University, and Stanford University. “Between the opportunities in high-performance digital logic with the potential for 3D integration and the possibilities for printed and even recyclable thin-film electronics, CNT transistors ... » read more

New Material for Printing At the Nanoscale, Strong & Light (Stanford/Northwestern)
By Technical Paper Link - 23 Nov, 2022 - Comments: 0

A new technical paper titled "Mechanical nanolattices printed using nanocluster-based photoresists" was published by researchers at Stanford University and Northwestern University. The researchers have developed a new material for nanoscale 3D printing to be used for drones, microelectronics and satellites, demonstrating that "the new material is able to absorb twice as much energy than othe... » read more

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