tag: Synopsys

SOT-MRAM To Challenge SRAM
By Bryon Moyer - 13 Jan, 2022 - Comments: 1

In an era of new non-volatile memory (NVM) technologies, yet another variation is poised to join the competition — a new version of MRAM called spin-orbit torque, or SOT-MRAM. What makes this one particularly interesting is the possibility that someday it could supplant SRAM arrays in systems-on-chip (SoCs) and other integrated circuits. The key advantages of SOT-MRAM technology are the pr... » read more

Is Programmable Overhead Worth The Cost?
By Brian Bailey - 13 Jan, 2022 - Comments: 0

Programmability has fueled the growth of most semiconductor products, but how much does it actually cost? And is that cost worth it? The answer is more complicated than a simple efficiency formula. It can vary by application, by maturity of technology in a particular market, and in the context of much larger systems. What's considered important for one design may be very different for anothe... » read more

Accelerating Software Development With Fast Virtual Prototypes
By Synopsys - 12 Jan, 2022 - Comments: 0

Most of today's largest semiconductor devices are highly complex system on chip (SoC) designs, which means that they include one or more embedded processors. This indicates that software provides some of the key functionality of the chip. The system cannot be fully verified or validated without both hardware and software. However, software development generally takes more time and resources to ... » read more

Setting Ground Rules For 3D-IC Designs
By Ed Sperling - 12 Jan, 2022 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss the changes in design tools and methodologies needed for 3D-ICs, with Sooyong Kim, director and product specialist for 3D-IC at Ansys; Kenneth Larsen, product marketing director at Synopsys; Tony Mastroianni, advanced packaging solutions director at Siemens EDA; and Vinay Patwardhan, product management group director at Cadence... » read more

Blog Review: Jan. 12
By Jesse Allen - 12 Jan, 2022 - Comments: 0

Synopsys' Twan Korthorst introduces the history of photonics, why it is important for the semiconductor industry, key market applications, and the future of photonic integrated circuits. Cadence's Paul McLellan takes a look at TSMC's recent announcements around its N3 and N3 HPC notes and the push for performance gains through design technology co-optimization Siemens' Sebastian Flock che... » read more

The Gargantuan 5G Chip Challenge
By Ed Sperling - 11 Jan, 2022 - Comments: 0

Blazing fast upload and download speeds for cellular data are coming, but making the technology function as expected throughout its expected lifetime is an enormous challenge that will require substantial changes across the entire chip ecosystem. While sub-6GHz is an evolutionary step from 4G LTE, the real promise of 5G kicks in with millimeter-wave (mmWave) technology. But these higher-freq... » read more

Preventing Failures Before They Occur
By Bryon Moyer - 11 Jan, 2022 - Comments: 1

A decade or so ago, when MEMS sensors were in the limelight, one of the touted applications was to install them on industrial or other equipment to get an advance warning if the equipment was approaching failure. Today, in-circuit monitoring brings the same promise. Are these competing technologies? Or can they be made to work together? “Almost all advanced tool manufacturing companies ... » read more

A Practical Approach To DFT For Large SoCs And AI Architectures, Part I
By Rahul Singhal - 11 Jan, 2022 - Comments: 0

The traditional processors designed for general-purpose applications struggle to meet the computing demands and power budgets of artificial intelligence (AI) or machine leaning (ML) applications. Several semiconductor design companies are now developing dedicated AI/ML accelerators that are optimized for specific workloads such that they deliver much higher processing capabilities with much low... » read more

Increasing IP And SoC Debug Efficiency 10X With Intelligent Waveform Reuse
By Synopsys - 11 Jan, 2022 - Comments: 0

Design and verification reuse lies at the very heart of every modern chip development effort. A system on chip (SoC) project with billions of gates cannot possibly be completed in reasonable time without leveraging blocks from prior projects and commercial intellectual property (IP) offerings. These reused blocks are themselves challenging to develop since they are as large and complex as previ... » read more

Quantifiable Assurance: From IPs to Platforms
By Technical Paper Link - 10 Jan, 2022 - Comments: 0

Abstract: "Hardware vulnerabilities are generally considered more difficult to fix than software ones because of their persistent nature after fabrication. Thus, it is crucial to assess the security and fix the potential vulnerabilities in the earlier design phases, such as Register Transfer Level (RTL), gate-level or physical layout. The focus of the existing security assessment techniques i... » read more

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