tag: Synopsys

Usage Models Driving Data Center Architecture Changes
By Ann Mutschler - 11 Feb, 2021 - Comments: 0

Data center architectures are undergoing a significant change, fueled by more data and much greater usage from remote locations. Part of this shift involves the need to move some processing closer to the various memory hierarchies, from SRAM to DRAM to storage. There is more data to process, and it takes less energy and time to process that data in place. But workloads also are being distrib... » read more

The Problem With Benchmarks
By Brian Bailey - 11 Feb, 2021 - Comments: 1

Benchmarks long have been used to compare products, but what makes a good benchmark and who should be trusted with their creation? The answer to those questions is more difficult than it may appear on the surface, and some benchmarks are being used in surprising ways. Everyone loves a simple, clear benchmark, but that is only possible when the selection criteria are equally simple. Unfortuna... » read more

Know Your Own Power, Early And Accurately
By Taruna Reddy - 11 Feb, 2021 - Comments: 0

By Taruna Reddy and Vin Liao Chip designers have always had to balance timing and area. Everyone wants a design as fast as possible and as compact as possible, but these two goals are usually in conflict. For the last couple of decades, minimal power consumption has been a third goal, often of equal importance. Some of the biggest drivers for the semiconductor industry are battery operated p... » read more

Blog Review: Feb. 10
By Jesse Allen - 10 Feb, 2021 - Comments: 0

Cadence's Paul McLellan finds out some of the pressing technological challenges and opportunities at the recent SEMI Industry Strategy Symposium, from the purity of gases and other materials used in semiconductor manufacturing to increasing cost and time-to-market pressures. Siemens EDA's Harry Foster examines trends in low power ASIC and IC design, including active management of power and t... » read more

Automotive Test Moves In-System
By Bryon Moyer - 09 Feb, 2021 - Comments: 1

With the electrification of automobiles, it’s not enough to test the new electronics thoroughly at the end of the manufacturing process. Safety standards now require that tests be performed live, in the field, with contingency plans should a test fail. “We see clear demand from the automotive semiconductor supply chain for design functionality specifically aimed at in-system monitoring,�... » read more

Why Improving Auto Chip Reliability Is So Hard
By SE Staff - 09 Feb, 2021 - Comments: 1

Tools and ecosystems that focus on reliability and the long-term health of chips are starting to coalesce for the automotive electronics industry. Data gleaned from a chip’s lifecycle — design, verification, test, manufacturing, and in-field operation — will become key to achieving the longevity, reliability, functional safety, and security of newer generations of automobiles. Having s... » read more

Data Issues Mount In Chip Manufacturing
By Anne Meixner - 09 Feb, 2021 - Comments: 2

For yield management systems the old calculation adage, "garbage in/garbage out" still rings true. Aligning and cleaning data remains a dirty business. With the increased value in data in the semiconductor supply chain, there now are essentially two supply chains running in parallel. One involves the physical product being created, while the other includes the data associated with each proce... » read more

A View Across The Siliconscape
By Stephen Crosher - 09 Feb, 2021 - Comments: 0

What would it look like if you had the magical ability to look inside a chip and cast your eyes across the tumultuous activities within the silicon itself? If you could gaze into the die and see the real-time peaks and troughs of voltage supply, stressed areas with high activity and heat and areas of calm where uneven workloads create idle processor cores. A vision of the chip landscape, seasca... » read more

Accelerating SoC Verification Closure With Unified Verification Management Solution
By Synopsys - 08 Feb, 2021 - Comments: 0

Functional verification of system-on-chip (SoC) designs requires best-in-class tools linked together in a unified solution in order to address exponential complexity challenges. There is no one-size-fits-all method for verification. Complex designs require a combination of virtual prototyping, static checks, formal analysis, simulation, emulation and FPGA prototyping. The execution of all the t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 05 Feb, 2021 - Comments: 0

Tools & IP Synopsys is joining Microsoft in the U.S. Department of Defense's Rapid Assured Microelectronics Prototypes (RAMP) program to support the development of IC hardware and workflow prototypes that incorporate Synopsys' assured design and manufacturing flows into Microsoft Azure. The RAMP program aims to bring commercial capabilities and speed to the development of semiconductors fo... » read more

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