Choosing Which Tasks To Optimize In Chips


The optimization of one or more tasks is an important aspect of every SoC created, but with so many options now on the table it is often unclear which is best. Just a few years ago, most people were happy to buy processors from the likes of Intel, AMD and Nvidia, and IP cores from Arm. Some even wanted the extensibility that came from IP cores like Tensilica and ARC. Then, in 2018, John Henn... » read more

The Challenges Of Incremental Verification


Verification consumes more time and resources than design, and yet little headway is being made to optimize it. The reasons are complex, and there are more questions than there are answers. For example, what is the minimum verification required to gain confidence in a design change? How can you minimize the cost of finding out that the change was bad, or that it had unintended consequences? ... » read more

Big Changes In Embedded Software


Every good hardware or software design starts with a structured approach throughout the design cycle, but as chip architectures and applications begin focusing on specific domains and include some version of AI, that structure is becoming more difficult to define. Embedded software, which in the past was written for very narrow functions with a minimal footprint, is increasingly getting blended... » read more

Continuous Integration And Deployment Flows With Virtual Prototypes


Not so long ago, embedded software developers huddled side by side in chilly bring-up labs, integrating and testing their code on physical prototypes of the final systems. Beyond the inconvenience, there were two major issues with this approach. The cost of replicating prototypes across a large software team was considerable, and these systems had to be maintained and managed. It became common ... » read more

Streamlining Vehicular Electrical System Design And Verification


Automobiles and other road vehicles such as trucks and buses have always been one of the most demanding applications for mechanical and electrical design. Systems must operate properly over a wide range of environmental conditions, facing extremes of temperature, humidity, sunlight, dirt, vibration and more. User expectations of reliability and availability mandate safety-critical design practi... » read more

Blog Review: April 27


Siemens' Joseph Dailey and Jake Wiltgen dispel misunderstandings around safety qualification of software tools and point to some of the safety issues that could lead to schedule delays and additional costs. Synopsys' Mark Kahan explains the testing that went into creating parts of the James Webb Space Telescope and key questions that were asked to ensure the mission could be successful even ... » read more

Week In Review: Manufacturing, Test


Onshoring and the supply chain Efforts to patch up supply chain weaknesses by moving more manufacturing onshore in the United States and Europe are generating a lot of buzz. Morris Chang, TMSC's founder, described those moves as "a very expensive exercise in futility," during an interview with the Brookings Institution and Center for Strategic and International Studies, adding that it is like... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys unveiled a new neural processing unit (NPU) IP and toolchain. DesignWare ARC NPX6 NPU IP scales from 4K to 96K MACs with power efficiency of 30 TOPS/Watt. A single instance offers 250 TOPS at 1.3 GHz on 5nm processes in worst-case conditions, or up to 440 TOPS by using new sparsity features, which can increase the performance and decrease energy demands of executing a n... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility Synopsys uncorked its new neural processor IP, which can be used to develop scalable neural processors in automotive and consumer products. The ARC NPX6 NPU IP can run at 3,500 TOPS (30 TOPS per watt), running up to 96K MACs with enhanced utilization, new sparsity features and new interconnect for scalability. The ARC NPX6FS NPU IP and MetaWare MX Toolkit for Safety can be... » read more

Curvilinear Photomasks Can Be Made Today


Multi-beam mask writers (MBMWs) and GPU-accelerated curvilinear ILT are enabling curvilinear photomasks to be made today. Despite the benefits of improved process windows, curvilinear photomask adoption is slow. Industry luminaries surveyed by the eBeam Initiative in 2021 ranked photomask inspection and infrastructure as the top barriers to adoption, as shown in figure 1. Yet only 4% say the b... » read more

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