tag: Synopsys

Executive Briefing: Aart de Geus
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler EDA, IP, semiconductors, electronics…actually every industry is woven into the tapestry of a global macroeconomic system. Running a business successfully within this environment requires a unique skillset; at once entrepreneurial as well as wise and discerning. System-Level Design sat down with Aart de Geus, chairman and co-CEO of Synopsys, to discuss these iss... » read more

Virtual Prototyping Is Golden
By Nithya Ruff - 27 Sep, 2012 - Comments: 0

By Nithya Ruff Watching the Olympics this past summer was quite exciting. I enjoyed seeing athletes at the peak of their performance and multiple records broken in many sports. What we don’t see is the years of practice and work behind this excellence. These athletes work at the technique, strength, endurance and mental attitude of winning. To me, this is no different than the work that goes... » read more

Experts At The Table: FPGA Prototyping Issues
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to discuss challenges in the FPGA prototyping world with Troy Scott, product marketing manager at Synopsys; Tom Feist, senior director of marketing at Xilinx; Shakeel Jeeawoody, vice president of marketing at Blue Pearl Software; and Ralph Zak, business development director at EVE. What follows are excerpts of that discussion. SLD: As we go forwar... » read more

Where Does It Hurt?
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ed Sperling The IC design industry is feeling a new kind of pain—this one driven by uncertainty over architectural shifts, new ecosystem interactions and new ways to account for costs. As mainstream ICs move from 50/45/40nm to around 32/28/22nm, there are only two choices for design teams—continue shrinking features or stack dies. In many cases, the ultimate solution may be a combina... » read more

Like Oil And Water
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler For years, the promise and allure of a concurrent design methodology included talk of models, high-level synthesis, virtual prototyping and other system-level technologies all peacefully coexisting in a single design methodology. While it sounds like a good idea, the model-based design approach hasn’t mixed well with the virtual prototype approach. And at l... » read more

Technical Considerations For Implementing USB 3.0 On SoCs
By Various Writers - 27 Sep, 2012 - Comments: 0

The Universal Serial Bus (USB) protocol has been the standard way to connect computers to external devices for nearly two decades. The protocol continues to evolve to support the growing demands of consumer devices. With its simplicity of use, USB is the number one choice of connectivity protocols in the consumer world. USB 3.0 early adoption began in 2010. Now, key USB software and systems pro... » read more

The Good And Bad Of Models
By Ed Sperling - 27 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler Driven by fierce competition and the fact that socket decisions are made long before silicon is manufactured, semiconductor companies today ship models and virtual prototypes to their OEMs very early in hopes of locking in the socket. Admittedly, this has been happening for some time, but due to complexity and the need for flexibility of models and virtual platf... » read more

SPOTLIGHT ON FD-SOI, FINFETS AT IEEE SOI CONFERENCE
;1-4 OCT, NAPA
By Various Writers - 25 Sep, 2012 - Comments: 0

The 38th annual SOI Conference is coming right up. Sponsored by IEEE Electron Devices Society, this is the only dedicated SOI conference covering the full technology chain from materials to devices, circuits and system applications. Chaired this year by Gosia Jurczak (manager of the Memories Program at imec), this excellent conference is well worth attending. It’s where the giants of the ... » read more

The Sky Isn’t Falling
By Ed Sperling - 20 Sep, 2012 - Comments: 0

By Ann Steffora Mutschler 3D ICs add a new dimension to design with new degrees of freedom possible, even with the added design and manufacturing complexities. Looking at the semiconductor ecosystem today and anticipating what will be needed to enable 3D ICs, it is certain that relationships will need to change. What will be required of the players and who will take responsibility for wh... » read more

Power And Performance: GSS Sees SOI Advantages For FinFETs
By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere.  But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

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