IC Test Solutions For The Automotive Market

By Mentor, a Siemens Business - 06 Jul, 2017 - Comments: 0

The amount of electronic content in passenger cars continues to grow rapidly, driven mainly by the integration of various advanced safety features, which will increase further with the move towards fully autonomous vehicles. It is critical that these safety-related devices adhere to the highest possible quality and reliability requirements formalized in the ISO 26262 standard that is being rapi... » read more

Chip Test Shifts Left

By Jeff Dorsch - 07 Jun, 2017 - Comments: 0

“Shift left” is a term traditionally applied to software testing, meaning to take action earlier in the V-shaped time line of a project. It has recently been touted in electronic design automation and IC design, verification, and test. “Test early and test often” is the classic maxim of software testing. What if that concept could also be implemented in semiconductor testing, to redu... » read more

The Future of Testing

By Jeff Dorsch - 08 May, 2017 - Comments: 0

In our previous test blog posts, we looked at the history of automated test equipment for semiconductors and for printed circuit boards. This month, we look ahead to the test technologies that are emerging. The chip ATE field has essentially boiled down to Advantest, Teradyne, and Xcerra (LTX-Credence), while the board test market is dominated by Teradyne and Keysight Technologies (formerly ... » read more

Time For Massively Parallel Testing

By Jeff Dorsch - 12 Apr, 2017 - Comments: 0

Time is money in electronics, as in other industries, and the more time that is invested in testing chips means more costs being added to the product in question. To speed up testing for memory devices and other semiconductors, test equipment vendors have resorted to parallel testing technology, simultaneously testing multiple chips at a time. The industry also is turning to system-level tes... » read more

Looking Back at Board Test

By Jeff Dorsch - 10 Apr, 2017 - Comments: 0

Printed circuit board testing has been around as long as printed circuit boards, also known as printed circuit assemblies and printed wiring boards. PCB technology started in the early 20th century with Thomas Edison and other inventors. As boards shrink to fit inside wearable gadgets and other products with compact form factors, PCB test equipment vendors are addressing new challenges. Boar... » read more

System-Level Testing

By Astronics - 10 Apr, 2017 - Comments: 0

This white paper on system-level testing for semiconductors. Covering the history and trends of system-level test for semiconductors, this solution brief discusses: The increasing complexities of testing advanced semiconductor integrated devices across a span of applications: automotive, mobile computing, wearables, and more; Semiconductor trends driving necessary shifts in testing method... » read more

12 Important Considerations When Migrating to the Digital Pattern Instrument

By NI - 10 Apr, 2017 - Comments: 0

The PXI Digital Pattern Instrument brings ATE-class digital to the PXI platform through features and programming that are familiar to semiconductor test engineers. Those features not only come through in the hardware of the instrument, they also appear in the NI-Digital Pattern Driver and Digital Pattern Editor. The digital pattern instrument represents an improved experience to previously exis... » read more

How Testing MEMS, Sensors Is Different

By Jeff Dorsch - 10 Apr, 2017 - Comments: 2

When it comes to testing microelectromechanical system devices and sensors, sometimes you have to shake and bake. [getkc id="311" comment="MEMS"] and [getkc id="187" kc_name="sensors"] are physically different from standard ICs. They require a specific type of stimulus to get the required testing results. Most chips only need to have an electrical charge run through them to gauge their pass/... » read more

Biz Talk: ASICs

By Ed Sperling - 27 Mar, 2017 - Comments: 0

eSilicon CEO [getperson id="11145" comment="Jack Harding"] talks about the future of scaling, advanced packaging, the next big things—automotive, deep learning and virtual reality—and the need for security. [youtube vid=leO8gABABqk] Related Stories Executive Insight: Jack Harding (Aug 2016) eSilicon’s CEO looks at industry consolidation, competition, China’s impact, an... » read more

Testing For Security

By Ed Sperling - 06 Mar, 2017 - Comments: 0

Ever since the IoT became a household name, people have been strategizing about ways to utilize non-secure devices to mount an attack. The first instances of using electricity to overload a device's circuits, thereby neutralizing existing security features, came to light in some of the earliest car hacking incidents. These are basically side-channel attacks using what amounts to an electroni... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?