tag: thermal

EDA On Board With New Package Options
By Ann Mutschler - 22 Jul, 2020 - Comments: 2

A groundswell of activity around multi-die integration and advanced packaging is pushing EDA companies to develop integration strategies that speed up time to sign-off, increase confidence that a design will work as expected, while still leaving enough room for highly customized solutions. Challenges range from how to architect a design, how to explore the best options and configurations, ho... » read more

Gaps Emerging In System Integration
By Brian Bailey - 29 Jun, 2020 - Comments: 0

The system integration challenge is evolving, but existing tools and methods are not keeping up with the task. New tools and flows are needed to handle global concepts, such as power and thermal, that cannot be dealt with at the block level. As we potentially move into a new era where IP gets delivered as physical pieces of silicon, this lack of an accepted flow will become a stumbling block. ... » read more

Rising To Meet The Thermal Challenge
By Cadence - 24 Jun, 2020 - Comments: 0

Thermal effects on electrical performance have always existed; processor speed limits are set by thermal limits, and power has been a key concern for the mobile and datacenter markets for a decade. Increased electrical content logically generates more heat, which affects system performance. For example, in the automotive market, ADAS and infotainment systems are drastically increasing automotiv... » read more

New Approaches For Dealing With Thermal Problems
By Ann Mutschler - 11 Jun, 2020 - Comments: 0

New thermal monitoring, simulation and analysis techniques are beginning to coalesce in chips developed at leading-edge nodes and in advanced packages in order to keep those devices running at optimal temperatures. This is particularly important in applications such as AI, automotive, data centers and 5G. Heat can kill a chip, but it also can cause more subtle effects such as premature aging... » read more

Benefits Of In-Chip Thermal Sensing
By Richard McPartland - 22 Apr, 2020 - Comments: 0

The latest SoCs on advanced semiconductor nodes typically include a fabric of sensors spread across the die, and for good reason. But why and what are the benefits? This first blog of a three-part series explores some of the key applications for in-chip thermal sensing and why embedding in-chip monitoring IP is an essential step to maximize performance and reliability and minimize power, or a... » read more

Power/Performance Bits: April 14
By Jesse Allen - 14 Apr, 2020 - Comments: 0

Undoped polymer ink Researchers at Linköping University, Chalmers University of Technology, University of Washington, University of Cologne, Chiba University, and Yunnan University developed an organic ink for printable electronics that doesn't need to be doped for good conductivity. "We normally dope our organic polymers to improve their conductivity and the device performance. The proces... » read more

Using Digital Image Correlation To Determine BGA Warpage
By Craig Hillman - 16 Jan, 2020 - Comments: 0

Digital image correlation (DIC) is a non-contact, full-field displacement, optical measurement technique. It is often used in the following applications: Material characterization Coefficient of thermal expansion (CTE) Glass transition temperature Young’s modulus Poisson’s ratio Sample testing for fatigue and failure In situ monitoring of displacements and str... » read more

Analog: Avoid Or Embrace?
By Brian Bailey - 16 Jan, 2020 - Comments: 0

We live in an analog world, but digital processing has proven quicker, cheaper and easier. Moving digital data around is only possible while the physics of wires can be safely abstracted away enough to provide reliable communications. As soon as a signal passes off-chip, the analog domain reasserts control for modern systems. Each of those transitions requires a data converter. The usage ... » read more

Power/Performance Bits: Jan. 7
By Jesse Allen - 07 Jan, 2020 - Comments: 0

Ferroelectric FET Researchers at Purdue University developed a ferroelectric transistor capable of both processing and storing information. The ferroelectric semiconductor field-effect transistor is made of alpha indium selenide, which overcomes the problem of ferroelectric materials not interfacing well with silicon. “We used a semiconductor that has ferroelectric properties. This way tw... » read more

Thermal Challenges In Advanced Packaging
By Ed Sperling - 02 Dec, 2019 - Comments: 2

CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

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