Understanding Process And Design Systematics

By KLA - 18 Jan, 2018 - Comments: 0

As design rules shrink, semiconductor manufacturing becomes more complex which leads to a huge increase in the defects which could cause a non-yielding die. Process control and inline defect analysis becomes widely relevant to help shorten the learning process from R&D to production. This paper discusses the various methodologies which leverage patterned wafer inspection tools to help analyze d... » read more

Speeding Up E-beam Inspection

By Mark LaPedus - 18 Jun, 2015 - Comments: 0

Wafer inspection, the science of finding killer defects in chips, is reaching a critical juncture. Optical inspection, the workhorse technology in the fab, is being stretched to the limit at advanced nodes. And e-beam inspection can find tiny defects, but it remains slow in terms of throughput. So to fill the gap, the industry has been working on a new class of multiple beam e-beam inspectio... » read more

Flash Dance For Inspection And Metrology

By Mark LaPedus - 16 Apr, 2015 - Comments: 0

Chipmakers are moving from planar technology to an assortment of 3D-like architectures, such as 3D NAND and finFETs For these devices, chipmakers face a multitude of challenges in the fab. But one surprising and oft-forgotten technology is emerging as perhaps the biggest challenge in both logic and memory—process control. Process control includes metrology and wafer inspection. Metrolo... » read more

Maglen: Multi-Beam E-Beam Inspection

By Mark LaPedus - 16 Feb, 2015 - Comments: 1

Wafer inspection, the science of finding defects on a wafer, is becoming more challenging and costly at each node. In fact, the ability to detect sub-30nm defects is challenging with today’s inspection tools, which are primarily based on two separate technologies—optical and e-beam. In the inspection flow, chipmakers first use e-beam inspection, mainly for engineering analysis. E-beam is... » read more

Wanted: Multi-beam E-Beam Inspection

By Mark LaPedus - 18 Sep, 2014 - Comments: 0

The IC industry is making a giant leap from planar devices to a range of next-generation architectures, such as 3D NAND and finFETs. But it’s taking longer than expected to ramp up these new technologies in the market. And the challenges are expected to mount for the next round of chips. It’s difficult to pinpoint the exact issues with 3D NAND and finFETs. On the manufacturing front alo... » read more

Wanted: New Metrology Funding Models

By Mark LaPedus - 21 Mar, 2013 - Comments: 0

By Mark LaPedus The shift toward the 20nm node and beyond will require new and major breakthroughs in chip manufacturing. Most of the attention centers around lithography, gate stacks, interconnects, strain engineering and design-for-manufacturing (DFM). Lost in the conversation are two other critical but overlooked pieces in the manufacturing puzzle—wafer inspection and metrology. ... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer