Wanted: New Metrology Funding Models

Rising costs, a fixed number of customers and limited options are forcing changes in how big equipment companies go to market—and with whom.

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By Mark LaPedus
The shift toward the 20nm node and beyond will require new and major breakthroughs in chip manufacturing.

Most of the attention centers around lithography, gate stacks, interconnects, strain engineering and design-for-manufacturing (DFM). Lost in the conversation are two other critical but overlooked pieces in the manufacturing puzzle—wafer inspection and metrology.

For years, inspection and metrology tool vendors have managed to stay one step ahead of the defect curve. But as chipmakers migrate toward finFETs, 2.5D/3D chips and other complex structures, process control will become even more challenging and costly.

In fact, three key process control tools, CD-SEMs, brightfield defect inspection and optical scatterometry, may soon run out of steam, prompting the need for a new class of 3D metrology gear. “When we get to the 14nm node, we may be able to get by with what we have,” said John Allgair, senior member of the technical staff and Fab 8 patterning metrology manager at GlobalFoundries. “As you get to 10nm, we might need a new technology.”

Next-generation 3D metrology tools exist to some degree, but the industry must make substantial investments to bring these technologies into production. And that’s precisely where the problem, and tension, exists between chipmakers and tool vendors. To develop new tools, equipment vendors want a bigger piece of the R&D pie and want customers to assume more of the risk.

“Different business models are definitely needed,” said Chris Talbot, senior director of strategic licensing at Applied Materials. “As the industry consolidates, with 450mm and EUV on the horizon, the amount of R&D that needs to be done not just in metrology and inspection, but right across the equipment industry, is enormous.”

One idea is to replicate ASML Holding’s recent and blockbuster business deal. Intel, Samsung and TSMC recently invested millions of dollars in ASML to speed up the development of extreme ultraviolet (EUV) lithography and 450mm tools. The three chipmakers also took minor stakes in ASML.

“The investments made by Intel and others in ASML are huge to solve an enormous problem,” Talbot said. “This is maybe one of the things we need to look at for other segments of the industry.”

Wanted: New business models
It’s unlikely that the inspection/metrology industry, or other fab tool sectors, will garner the same level of funding as the ASML deal. Lithography is considered the key manufacturing technology in IC scaling, and it will require a substantial investment to propel the development of EUV and 450mm lithography tools.

In the process control sector, the industry is providing substantial funding to KLA-Tencor, Zeiss and others for the development of EUV mask inspection tools. But beyond EUV, the industry may need to rethink the R&D funding model.

For years, chipmakers, consortia, venture capitalists and even governments have provided various levels of funding to equipment vendors for the development of new fab tools. Generally, the fab tool vendors themselves have assumed a larger percentage of the R&D bill and assumed more of the risk.

Today, however, tool vendors can no longer afford to develop a system on a whim and foot the R&D bill. The development costs, and the risks, are too high. After all, only a handful of chipmakers buy advanced tools today.

As before, there are no guarantees that a proposed tool will move into production. At times, equipment makers also fail to deliver the promised goods. But the real problem surfaces when a chipmaker demands a new system for a future node. An equipment maker complies and develops the system.

Then, in some cases, the IC maker decides not to insert the proposed tool. Instead, the company ends up extending the current technology. For this reason and others, the equipment maker ends up holding the bag. “If you look at the last 10 years, there are very few examples where a technology that we talked about was actually converted into a tool that we could put in our fabs,” acknowledged Alok Vaid, senior member of the technical staff at GlobalFoundries.

So, the time is ripe for a new R&D and risk-sharing model, although don’t look for an immediate change. “The industry has invested in time, resources and materials in process control,” said GlobalFoundries’ Allgair. “You’ve seen some investments through research consortiums. But we’re probably reaching the point where it needs to extend a little bit further than that. We should try to explore some different funding models.”

Given the enormous risks involved in tool development, chipmakers also must open the lines of communication and do a better job in conveying the exact types of technologies needed for a given node, he added.

Wanted: New metrology tools
Chipmakers are finally addressing the problems with the current R&D funding model, as some of today’s process control tools may soon hit the scaling wall. Fortunately, there are some promising next-generation candidates on the table. For example, a possible successor to the CD-SEM is helium-ion imaging; meanwhile, multi-beam e-beam inspection could displace brightfield inspection. And X-ray scattering (CD-SAXS) could succeed optical scatterometry.

In one area, Applied and KLA-Tencor are among the major suppliers of optical-based brightfield inspection tools. Used to find defects during transistor fabrication, brightfield is a technique that collects light reflected from a defect. In turn, the defect appears dark against a white background. Brightfield is often used in conjunction with single-beam e-beam inspection, which detects even smaller defects.

As chips move to finer feature sizes, brightfield may have trouble seeing smaller defects. “It’s believed that 20nm is a critical particle size in which scattering falls off,” said Benjamin Bunday, senior technical staff member at Sematech. “E-beam inspection can see 5nm particles. But, of course, the throughput is too slow.”

Still, the death of optical and single-beam e-beam inspection is greatly exaggerated, said Mingwei Li, director of product marketing at KLA-Tencor. “Even with today’s wavelengths in optical inspection, we are detecting defects in the range of 10nm,” Li said. “We are not very far off with the ITRS roadmap, which specifies 5nm defects. We also think e-beam has a place.”

One possible successor to brightfield is multi-beam e-beam inspection technology. Multiple beams can boost inspection throughputs, but the technology is difficult to develop and control.

One startup, Multibeam, is developing a 100-column e-beam inspection system. Multibeam’s technology will not replace today’s optical and single-beam e-beam inspection, but rather it is a complementary approach, said David Lam, a venture capitalist and chairman of Multibeam. “We’re focusing on detecting small physical defects that are almost indistinguishable to noise,” Lam said.

Perhaps the biggest challenge for startups like Multibeam is clear—getting funding. “It is indeed very difficult to get funding,” Lam said. “Semiconductor equipment, in particular, is considered passé. It’s something that’s takes too much money. You can’t go IPO. It’s a very unattractive investment for investors.”

Multibeam is not looking for a handout, but the startup needs some backing to advance its tool. “I don’t think it will take $3 billion or $4 billion in funding like EUV. I’d say tens of millions of dollars,” he added.

Besides a new inspection technology, the IC industry is also looking for a next-generation scatterometry tool. Scatterometry analyzes changes in the intensity of light in a device, but the shift towards finFETs presents a challenge for the technology.

As a replacement, the industry is looking at CD-SAXS, a technique that uses a shorter wavelength to measure structures. The downfall with CD-SAXS is that it makes use of a synchrotron radiation source. “CD-SAXs is too slow,” said GlobalFoundries’ Allgair. “We need a new high-brightness source and faster measurement times.”

Another tool under stress is the scanning electron microscope (CD-SEM), which measures critical dimensions in chip structures. “The CD-SEM today, for the most demanding applications, cannot resolve 3D information,” said Eric Solecky, senior manufacturing engineer at IBM.

There is one solution on the table. In 2006, Carl Zeiss acquired Alis, a supplier of helium ion microscopy. The technology was supposed to provide better resolutions than CD-SEMs. “We thought we would go to the semiconductor market and solve all of their problems,” said Bipin Singh, product manager for Zeiss. “It turns out the traditional CD-SEM was good enough. The list price for a helium ion microscope was $2.1 million. The industry wasn’t willing to bear the costs.”

Last year, Zeiss decided to focus its helium ion microscopes for nanotechnology fabrication. But as the IC industry moves towards finFETs, some are once again looking at helium ion as a possible replacement for CD-SEMs.

Applied, Hitachi and other CD-SEM suppliers are not throwing in the towel just yet. “The case for helium ion is a bit fuzzy,” said Applied’s Talbot. “Conventional CD-SEMs are getting older, but they are still doing the job and are extendable.”